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LTC2484CDD Datasheet(PDF) 27 Page - Linear Technology |
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LTC2484CDD Datasheet(HTML) 27 Page - Linear Technology |
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27 / 40 page ![]() 27 LTC2484 2484fa Automatic Differential Input Current Cancellation In applications where the sensor output impedance is low (up to 10k Ω with no external bypass capacitor or up to 500 Ω with 0.001µF bypass), complete settling of the input occurs. In this case, no errors are introduced and direct digitization of the sensor is possible. For many applications, the sensor output impedance com- bined with external bypass capacitors produces RC time constants much greater than the 580ns required for 1ppm accuracy. For example, a 10k Ω bridge driving a 0.1µF bypass capacitor has a time constant an order of magni- tude greater than the required maximum. Historically, settling issues were solved using buffers. These buffers led to increased noise, reduced DC performance (Offset/ Drift), limited input/output swing (cannot digitize signals near ground or VCC), added system cost and increased power. The LTC2484 uses a proprietary switching algo- rithm that forces the average differential input current to zero independent of external settling errors. This allows accurate direct digitization of high impedance sensors without the need for buffers. Additional errors resulting from mismatched leakage currents must also be taken into account. The switching algorithm forces the average input current on the positive input (IIN+) to be equal to the average input current on the negative input (IIN–). Over the complete conversion cycle, the average differential input current (IIN+ – IIN–) is zero. While the differential input current is zero, the common mode input current (IIN++ IIN–)/2 is proportional to the difference between the common mode input voltage (VINCM) and the common mode reference voltage (VREFCM). In applications where the input common mode voltage is equal to the reference common mode voltage, as in the case of a balance bridge type application, both the differ- ential and common mode input current are zero. The accuracy of the converter is unaffected by settling errors. Mismatches in source impedances between IN+ and IN– also do not affect the accuracy. In applications where the input common mode voltage is constant but different from the reference common mode voltage, the differential input current remains zero while the common mode input current is proportional to the difference between VINCM and VREFCM. For a reference common mode of 2.5V and an input common mode of 1.5V, the common mode input current is approximately 0.74 µA (in simultaneous 50Hz/60Hz rejection mode). This common mode input current has no effect on the accuracy if the external source impedances tied to IN+ and IN– are matched. Mismatches in these source impedances lead to a fixed offset error but do not affect the linearity or full- scale reading. A 1% mismatch in 1k Ω source resistances leads to a 15ppm shift (74 µV) in offset voltage. APPLICATIO S I FOR ATIO Figure 11. LTC2484 Equivalent Analog Input Circuit VREF + VIN + VCC RSW (TYP) 10k ILEAK ILEAK VCC ILEAK ILEAK VCC RSW (TYP) 10k CEQ 12pF (TYP) RSW (TYP) 10k ILEAK IIN + VIN – IIN – IREF + IREF – 2484 F11 ILEAK VCC ILEAK ILEAK SWITCHING FREQUENCY fSW = 123kHz INTERNAL OSCILLATOR fSW = 0.4 • fEOSC EXTERNAL OSCILLATOR GND RSW (TYP) 10k |
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