PCI1450 datasheet(27/132 Pages) TI

27 / 132 page

PCI1450 GFN/GJG

PC CARD CONTROLLER

SCPS044 – SEPTEMBER 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PC Card insertion/removal and recognition

The 1995 PC Card Standard addresses the card detection and recognition process through an interrogation

procedure that the socket must initiate upon card insertion into a cold, unpowered socket. Through this

interrogation, card voltage requirements and interface (16-bit vs. CardBus) are determined.

The scheme uses the CD1, CD2, VS1, and VS2 signals (CCD1, CCD2, CVS1, CVS2 for CardBus). A PC Card

designer connects these four pins in a certain configuration depending on the type of card and the supply

voltage. The encoding scheme for this, defined in the 1997 PC Card Standard, is shown in Table 17.

Table 17. PC Card – Card Detect and Voltage Sense Connections

CD2//CCD2

CD1//CCD1

VS2//CVS2

VS1//CVS1

Key

Interface

Voltage

Ground

Open

5 V

16-bit PC Card

5 V

Ground

Open

Ground

5 V

16-bit PC Card

5 V and 3.3 V

Ground

5 V

16-bit PC Card

5 V, 3.3 V, and

X.X V

Ground

Open

Ground

16-bit PC Card

3.3 V

Ground

Connect to CVS1

Open

Connect to CCD1

CardBus PC Card

3.3 V

Ground

16-bit PC Card

3.3 V and X.X V

Connect to CVS2

Ground

Connect to CCD2

Ground

CardBus PC Card

3.3 V and X.X V

Connect to CVS1

Ground

Connect to CCD2

CardBus PC Card

3.3 V, X.X V, and

Y.Y V

Ground

Open

16-bit PC Card

Y.Y V

Connect to CVS2

Ground

Connect to CCD2

Open

CardBus PC Card

Y.Y V

Ground

Connect to CVS2

Connect to CCD1

Open

CardBus PC Card

X.X V and Y.Y V

Connect to CVS1

Ground

Open

Connect to CCD2

CardBus PC Card

Y.Y V

Ground

Connect to CVS1

Ground

Connect to CCD1

Reserved

Ground

Connect to CVS2

Connect to CCD1

Ground

Reserved

P2C power switch interface (TPS2202A/2206)

A power switch with a PCMCIA-to-peripheral control (P2C) interface is required for the PC Card powering

interface. The TI TPS2206 (or TPS2202A) Dual-Slot PC Card Power-Interface Switch provides the P2C

interface to the CLOCK, DATA, and LATCH terminals of the PCI1450. Figure 8 shows the terminal assignments

of the TPS2206. Figure 9 illustrates a typical application where the PCI1450 represents the PCMCIA controller.

There are two ways to provide a clock source to the power switch interface. The first method is to provide an

external clock source such as a 32 kHz real time clock to the CLOCK terminal. The second method is to use

the internal ring oscillator. If the internal ring oscillator is used, then the PCI1450 provides its own clock source

for the PC Card interrogation logic and the power switch interface. The mode of operation is determined by the

setting of bit 27 of the

system control register (PCI offset 80h). This bit is encoded as follows:

0 = CLOCK terminal (terminal U12) is an input (default).

1 = CLOCK terminal is an output that utilizes the internal oscillator.

A 43 k

W pulldown resistor should be tied to the CLOCK pin.

PCI1450 Datasheet(PDF) 27 Page - Texas Instruments

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