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DM9010EP Datasheet(PDF) 12 Page - Davicom Semiconductor, Inc. |
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DM9010EP Datasheet(HTML) 12 Page - Davicom Semiconductor, Inc. |
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12 / 62 page ![]() DM9010 Single Chip Ethernet Controller with General Processor Interface Preliminary 12 Version: DM9010-17--DS-P04 Jan. 18, 2006 Open-Drain output and low active. 14 RST I,PD Hardware Reset Command, active high to reset the DM9010 6,7,8,9,10, 11,12,13, 89,88,87, 86,85,84, 83,82 SD0~15 I/O,PD Processor Data Bus bit 0~15 93,94,95, 96,97,98 SA4~9 I,PD Address Bus 4~9 These pins are used to select the DM9010. When SA9 and SA8 are in high states, and SA7 and AEN are in low states, and SA6~4 are matched with strap pins TXD2~0, the DM9010 is selected. 92 CMD I,PD Command Type When high, the access of this command cycle is DATA port When low, the access of this command cycle is INDEX port 91 IO16 O Word Command Indication When the access of internal memory is word or Dword width, this pin will be asserted This pin is low active at default; its polarity can be modified by EEPROM setting. See the EEPROM content description for detail 100 INT O,PD Interrupt Request This pin is high active at default, its polarity can be modified by EEPROM setting or strap pin MDC. See the EEPROM content description for detail 56,53,52, 51,50,49, 47,46,45, 44,43,41, 40,39,38 37 SD16~31 (in double word mode) I/O,PD Processor Data Bus bit 16~31 These pins are used as data bus bits 16~31 when the DM9010 is set to double word mode (the straps pin EEDO is pulled high and WAKE is not pull-high) 57 IO32 (in double word mode) O,PD Double Word Command Indication This pins is used as the double word command indication when the DM9010 is set to double data word mode, and this pin will be asserted when the access of internal memory is double word width This pin is low active at default; its polarity can be modified by EEPROM setting. See the EEPROM content description for detail When the IO32 pin is pulled high, the INT pin is low active; otherwise the INT pin is high active 5.3 EEPROM Interface 64 EEDI I Data from EEPROM 65 EEDO O,PD Data to EEPROM This pin is also used as a strap pin. It combines with strap pin WOL, and it can set the data width of the internal memory access The decoder table is the following, where the logic 1 means the strap pin is pulled high WAKE EEDO data width 0 0 16-bit 0 1 32-bit 1 0 8-bit |
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