DM9010EP datasheet(30/62 Pages) DAVICOM

30 / 62 page

DM9010

Single Chip Ethernet Controller with General Processor Interface

Preliminary

Version: DM9010-17--DS-P04

Jan. 18, 2006

7. EEPROM Format

name

Word

offset

Description

MAC address

0~5

6 Byte Ethernet Address

Auto Load Control

6-7

Bit 1:0=01: Update vendor ID and product ID

Bit 3:2=01: Accept setting of WORD6 [8:0]

Bit 5:4=01: Accept setting of WORD6 [11:9]

Bit 7:6=01: Accept setting of WORD7 [3:0]

Bit 11:10=01: Accept setting of WORD7 [7]

Bit 13:12=01: Accept setting of WORD7 [8]

Bit 15:14=01: Accept setting of WORD7 [14]

Vendor ID

8-9

2 byte vendor ID (Default: 0A46H)

Product ID

10-11 2 byte product ID (Default: 9000H)

pin control

12-13 When word 3 bit [3:2]=01, these bits can control the IOR#, IOW# and INT pins

polarity.

Bit0: Reserved

Bit1: IOR# pin is active low when set (default: active low)

Bit2: IOW# pin is active low when set (default: active low)

Bit3: INT pin is active low when set (default: active high)

Bit4: INT pin s open-collected (default: force output)

Bit 8:5: Reserved

When word 3 bit [5:4]=01, the I/O base can be re-configured.

Bit11:09: I/O base (default: 300H)

000 : 300H

001 : 310H

010 : 320H

011 : 330H

100 : 340H

101 : 350H

110 : 360H

111 : 370H

Bit15:12: reserved

Wake-up mode control

14-15 Bit0: The WAKE pin is active low when set (default: active high)

Bit1: The WAKE pin is in pulse mode when set (default: level mode)

Bit2: magic wakeup event is enabled when set. (default: disable))

Bit3: link_change wakeup event is enabled when set (default: disable)

Bit6:4: reserved

Bit7: LED mode 1 (default: 0)

Bit8: internal PHY is enabled after power-on (default: disable)

Bit13:9: reserved

Bit14: 1: HP Auto-MDIX ON, 0: HP Auto-MDIX OFF(default ON)

Bit15: reserved

RESERVED

16-17

RESERVED

18-19

RESERVED

20-21

RESERVED

22-23

DM9010EP Datasheet(PDF) 30 Page - Davicom Semiconductor, Inc.

DM9010EP Datasheet(HTML) 30 Page - Davicom Semiconductor, Inc.

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