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TPIC83000IPWRQ1 Datasheet(PDF) 9 Page - Texas Instruments |
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TPIC83000IPWRQ1 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 44 page ![]() RX TX Start b0 b1 b2 b3 b4 b5 b6 b7 Parity Start b0 b1 b2 b3 b4 b5 b6 b7 Parity Stop Stop Stop RX-TX = 1.5 bit TX TX Start b0 b1 b2 b3 b4 b5 b6 b7 Parity Start b0 b1 b2 b3 b4 b5 b6 b7 Parity Stop Stop Stop RX-TX = 2 bit Internal Common Clock DI/DO RX Data Sampling Timing 0 7 15 0 7 15 0 Internal Common Clock DI/DO Output Data Timing 0 7 15 0 7 15 0 Start Bit Acknowledge Start bit is valid LSB Acknowledge bit is valid Start Bit Acknowledge Start bit is valid LSB Acknowledge bit is valid TPIC83000-Q1 www.ti.com SLDS171 – NOVEMBER 2009 UART Communication Communication Protocol • Protocol: UART • Transfer Rate: See Table 21 • Data transfer: See Table 21 • Internal Oscillator : 38.4k x 16 x 4 = 2.458 MHz • Data length = 8 bit, Start bit = 1 bit, Stop bit = 1, Parity = even • Error detection: parity error, over run error, framing error. Ignore the frame when error is detected. • Time out for "packet not done" is 13 bit. Ignore received data. No response. • NU: IC to microprocessor is 0. microprocessor to IC 1 or 0. • Interval Rx-Rx = 2 bit to 13 bit, Rx-Tx = 1.5 bit, Tx-Tx = 2 bit Figure 3. UART Communication Frames, Sampling, and Timing Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TPIC83000-Q1 |
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