LPC1111 datasheet(28/59 Pages) NXP

Part #	LPC1111

Description	32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash and 8 kB SRAM

PDF	59 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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28 / 59 page

LPC1111_12_13_14_1

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Product data sheet

Rev. 01 — 16 April 2010

28 of 59

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

7.16.6 External interrupt inputs

All GPIO pins can be level or edge sensitive interrupt inputs.

7.16.7 Memory mapping control

The Cortex-M0 incorporates a mechanism that allows remapping the interrupt vector table

to alternate locations in the memory map. This is controlled via the Vector Table Offset

The vector table may be located anywhere within the bottom 1 GB of Cortex-M0 address

space. The vector table must be located on a 128 word (512 byte) boundary.

7.17 Emulation and debugging

Debug functions are integrated into the ARM Cortex-M0. Serial wire debug with four

breakpoints and two watchpoints is supported.

LPC1111 Datasheet(PDF) 28 Page - NXP Semiconductors