LPC1111 datasheet(11/59 Pages) NXP

11 / 59 page

LPC1111_12_13_14_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 16 April 2010

11 of 59

NXP Semiconductors

LPC1111/12/13/14

32-bit ARM Cortex-M0 microcontroller

[1]

See Figure 27 for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to

reset the chip and wake up from Deep power-down mode.

[2]

5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 26).

[3]

I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus.

[4]

5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.

When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 26).

[5]

When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded

(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.

XTALIN

6[5]

Input to the oscillator circuit and internal clock generator circuits. Input

voltage must not exceed 1.8 V.

XTALOUT

7[5]

Output from the oscillator amplifier.

VSS

5; 41

Ground.

Table 3.

LPC1113/14 pin description table (LQFP48 package) …continued

Symbol

Type

Description

Table 4.

LPC1114 pin description table (PLCC44 package)

Symbol

Type

Description

PIO0_0 to PIO0_11

I/O

Port 0 — Port 0 is a 12-bit I/O port with individual direction and function

controls for each bit. The operation of port 0 pins depends on the function

selected through the IOCONFIG register block.

RESET/PIO0_0

7[1]

RESET — External reset input: A LOW on this pin resets the device,

causing I/O ports and peripherals to take on their default states, and

processor execution to begin at address 0.

I/O

PIO0_0 — General purpose digital input/output pin.

PIO0_1/CLKOUT/

CT32B0_MAT2

8[2]

I/O

PIO0_1 — General purpose digital input/output pin. A LOW level on this pin

during reset starts the ISP command handler.

CLKOUT — Clockout pin.

CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

PIO0_2/SSEL0/

CT16B0_CAP0

14[2]

I/O

PIO0_2 — General purpose digital input/output pin.

SSEL0 — Slave Select for SPI0.

CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.

PIO0_3

18[2]

I/O

PIO0_3 — General purpose digital input/output pin.

PIO0_4/SCL

19[3]

I/O

PIO0_4 — General purpose digital input/output pin (open-drain).

I/O

SCL — I2C-bus, open-drain clock input/output. High-current sink only if I2C

Fast-mode Plus is selected in the I/O configuration register.

PIO0_5/SDA

20[3]

I/O

PIO0_5 — General purpose digital input/output pin (open-drain).

I/O

SDA — I2C-bus, open-drain data input/output. High-current sink only if I2C

Fast-mode Plus is selected in the I/O configuration register.

PIO0_6/SCK0

26[2]

I/O

PIO0_6 — General purpose digital input/output pin.

I/O

SCK0 — Serial clock for SPI0.

PIO0_7/CTS

27[2]

I/O

PIO0_7 — General purpose digital input/output pin (high-current output

driver).

CTS — Clear To Send input for UART.

PIO0_8/MISO0/

CT16B0_MAT0

31[2]

I/O

PIO0_8 — General purpose digital input/output pin.

I/O

MISO0 — Master In Slave Out for SPI0.

CT16B0_MAT0 — Match output 0 for 16-bit timer 0.

LPC1111 Datasheet(PDF) 11 Page - NXP Semiconductors

LPC1111 Datasheet(HTML) 11 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

Datasheet Download

Link URL