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LPC1111 Datasheet(PDF) 14 Page - NXP Semiconductors |
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LPC1111 Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 59 page ![]() LPC1111_12_13_14_1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 16 April 2010 14 of 59 NXP Semiconductors LPC1111/12/13/14 32-bit ARM Cortex-M0 microcontroller [1] See Figure 27 for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up from Deep power-down mode. [2] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 26). [3] I2C-bus pads compliant with the I2C-bus specification for I2C standard mode and I2C Fast-mode Plus. [4] 5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input. When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 26). [5] When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded (grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating. VDD 1; 12 I 3.3 V supply voltage to the internal regulator, the external rail, and the ADC. Also used as the ADC reference voltage. XTALIN 10[5] I Input to the oscillator circuit and internal clock generator circuits. Input voltage must not exceed 1.8 V. XTALOUT 11[5] O Output from the oscillator amplifier. VSS 9; 43 I Ground. Table 4. LPC1114 pin description table (PLCC44 package) …continued Symbol Pin Type Description |
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