SC68C752B datasheet(28/48 Pages) NXP

28 / 48 page

SC68C752B_4

Product data sheet

Rev. 04 — 20 January 2010

28 of 48

NXP Semiconductors

SC68C752B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs

7.9 Interrupt Identification Register (IIR)

The IIR is a read-only 8-bit register which provides the source of the interrupt in a

prioritized manner. Table 18 shows Interrupt Identification Register bit settings.

The interrupt priority list is shown in Table 19.

Table 18.

Interrupt Identification Register bits description

Bit

Symbol

Description

7:6

IIR[7:6]

Mirror the contents of FCR[0].

IIR[5]

RTSn/CTSn LOW-to-HIGH change of state

IIR[4]

1 = Xoff/Special character has been detected

3:1

IIR[3:1]

3-bit encoded interrupt. See Table 19.

IIR[0]

Interrupt status.

logic 0 = an interrupt is pending

logic 1 = no interrupt is pending

Table 19.

Interrupt priority list

Priority

level

IIR[5]

IIR[4]

IIR[3]

IIR[2]

IIR[1]

IIR[0]

Source of the interrupt

0110receiver line status error

1100receiver time-out interrupt

0100RHR interrupt

0010THR interrupt

0000modem interrupt

0000received Xoff signal/ special

character

0000CTSn, RTSn change of state from

active (LOW) to inactive (HIGH)

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