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SC68C752B Datasheet(PDF) 35 Page - NXP Semiconductors |
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SC68C752B Datasheet(HTML) 35 Page - NXP Semiconductors |
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35 / 48 page  SC68C752B_4 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 20 January 2010 35 of 48 NXP Semiconductors SC68C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs 11. Dynamic characteristics [1] RCLK is an internal signal derived from Divisor Latch LSB (DLL) and Divisor Latch MSB (DLM) divisor latches. [2] Applies to external clock; crystal oscillator max 24 MHz. [3] Maximum frequency = [4] Reset pulse must occur when CS is inactive. Table 27. Dynamic characteristics Tamb = −40 °C to +85 °C; tolerance of VCC ± 10 %, unless specified otherwise. Symbol Parameter Conditions VCC =2.5 V VCC =3.3 V and 5V Unit Min Max Min Max td1 R/W to chip select 10 - 10 - ns td2 read cycle delay 25 pF load 20 - 20 - ns td3 delay from CS to data 25 pF load - 77 - 26 ns td4 data disable time 25 pF load - 15 - 15 ns td6 write cycle delay 25 - 25 - ns td7 delay from WRITE to output 25 pF load - 100 - 33 ns td8 delay to set interrupt from modem input 25 pF load - 100 - 24 ns td9 delay to reset interrupt from READ 25 pF load - 100 - 24 ns td10 delay from stop to set interrupt - 1TRCLK[1] -1TRCLK[1] s td11 delay from READ to reset interrupt 25 pF load - 100 - 29 ns td12 delay from start to set interrupt - 100 - 100 ns td13 delay from WRITE to transmit start 8TRCLK[1] 24TRCLK[1] 8TRCLK[1] 24TRCLK[1] s td14 delay from WRITE to reset interrupt - 100 - 70 ns td15 delay from stop to set RXRDY -1TRCLK[1] -1TRCLK[1] s td16 delay from READ to reset RXRDY - 100 - 75 ns td17 delay from WRITE to set TXRDY - 100 - 70 ns td18 delay from start to reset TXRDY -16TRCLK[1] - 16TRCLK[1] s th2 R/W hold time from CS 10 - 10 - ns th3 data hold time 15 - 15 - ns th4 address hold time 15 - 15 - ns tWL pulse width LOW 10 - 6 - ns tWH pulse width HIGH 10 - 6 - ns fXTAL1 frequency on pin XTAL1 [2][3] -48 - 80 MHz t(RESET) RESET pulse width [4] 200 - 200 - ns tsu1 address setup time 10 - 10 - ns tsu2 data setup time 16 - 16 - ns tw1 CS strobe width 77 - 30 - ns 1 t wclk () --------------- |
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