Preliminary Technical Data

AD5757/AD5737

Rev. PrD | Page 23 of 31

READBACK OPERATION

Readback mode is invoked by setting the R/W bit = 1 in the serial input register write. With R/W = 1, bits DUT_AD1, DUT_AD0, in

association with bits RD4, RD3, RD2, RD1, RD0 (See Table 34), select the register to be read. The remaining data bits in the write

sequence are don’t care. During the next SPI transfer, the data appearing on the SDO output contains the data from the previously

addressed register. The readback diagram in Figure 3 shows the readback sequence.

Table 33. Input Shift Register Contents for a read operation

D23

D22

D21

D20 D19 D18 D17 D16

D15 to D0

R/W DUT_AD1 DUT_AD0 RD4 RD3 RD2 RD1 RD0

X

Table 34. Read Address Decoding

RD4

RD3

RD2

RD1

RD0

Function

0

0

0

0

0

Read DACA Data Register

0

0

0

0

1

Read DACB Data Register

0

0

0

1

0

Read DACC Data Register

0

0

0

1

1

Read DACD Data Register

0

0

1

0

0

Read Control Register DAC A

0

0

1

0

1

Read Control Register DAC B

0

0

1

1

0

Read Control Register DAC C

0

0

1

1

1

Read Control Register DAC D

0

1

0

0

0

Read Gain Register A

0

1

0

0

1

Read Gain Register B

0

1

0

1

0

Read Gain Register C

0

1

0

1

1

Read Gain Register D

0

1

1

0

0

Read Offset Register A

0

1

1

0

1

Read Offset Register B

0

1

1

1

0

Read Offset Register C

0

1

1

1

1

Read Offset Register D

1

0

0

0

0

Clear Code Register DAC A

1

0

0

0

1

Clear Code Register DAC B

1

0

0

1

0

Clear Code Register DAC C

1

0

0

1

1

Clear Code Register DAC D

1

0

1

0

0

Slew Rate Control Register DAC A

1

0

1

0

1

Slew Rate Control Register DAC B

1

0

1

1

0

Slew Rate Control Register DAC C

1

0

1

1

1

Slew Rate Control Register DAC D

1

1

0

0

0

Read Status Register

1

1

0

0

1

Read Main Control Register

1

1

0

1

0

Read DC-DC Control Register

Read Back Example

To read back the Gain Register of Device #1 Channel A on the AD5757, the following sequence should be implemented:

1. Write 0xA80000 to the AD5757 input register. This configures the AD5757 device address #1 for read mode with the Gain Register of

channel A selected.. Note that all the data bits, D15 to D0, are don’t care.

2.

Follow this with any read/write command. During this command, the data from the selected Gain Register is clocked out on the SDO

line.