ADF7242BCPZ datasheet(62/108 Pages) AD

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ADF7242

Rev. 0 | Page 62 of 108

Automatic Gain Control (AGC) and Receive Signal

Strength Indicator (RSSI)

The ADF7242 AGC circuit features fast overload recovery using

dynamic bandwidth adjustments for fast preamble acquisition

and optimum utilization of the dynamic range of the receiver path.

The radio controller automatically enables the AGC after an

offset correction phase, which is carried out when the trans-

ceiver enters the RX state. The optimum AGC configuration

parameters depend on the selected data rate, the modulation

format, and the configuration of the receiver offset correction

loop. The recommended settings for the AGC configuration

registers based on the modulation parameters, shown in Table 22,

are given in the Device Configuration section.

In GFSK/FSK mode, it is possible to lock the AGC and prevent

further gain updates after the reception of the preamble using

preamble.

The RSSI readback value is continuously updated while the

ADF7242 is in the RX state. The result is provided in Register

rrb, Field rssi_readback (0x30C[7:0]) in decibels relative to

1 mW (dBm) using signed twos complement notation. The

RSSI averaging window is synchronized with the start of the

active RX phase at the end of the MAC delay following an

RC_RX command. The RSSI averaging time is programmable

with Register agc_cfg5, Field rssi_avg_time (0x3B9[1:0]), and

depends on the AGC update rate according to the following

formula:

T_avg_rssi = 77 ns × 2α

where

α = 2 + (Register agc_cfg5, Field agc_filt2_tavg1) +(Register

agc_cfg6, Field agc_filt2_tavg2) + (Register agc_cfg5, Field

rssi_avg_time)

In IEEE 802.15.4-2006 mode, the default RSSI averaging period

of 128 μs, or eight symbol periods, must be used for compliance

with the IEEE 802.15.4-2006 standard. If the ADF7242 is

operating in the IEEE 802.15.4-2006 packet mode, the RSSI of

received frames is measured and stored together with the frame

in RX_BUFFER. The RSSI is measured in a window with a

length of eight symbols immediately following the detected

SFD. The result is then stored in place of the first byte of the

FCS of the received frame in RX_BUFFER. For GFSK/FSK

mode, the optimum RSSI averaging time is application dependent

and the default settings should be appropriate for most

applications.

It is also possible to compensate for systematic errors of the

measured RSSI value and/or production tolerances by adjusting

the RSSI readback value by an offset value that can be

programmed in Register agc_cfg5, Field rssi_offs (0x3B9[4:2]).

The adjustment resolution is in 1 dB steps.

ADF7242BCPZ Datasheet(PDF) 62 Page - Analog Devices

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