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34825 Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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34825 Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 39 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 25 34825 FUNCTIONAL DEVICE OPERATION LOGIC CONTROL FEATURES reset caused by the VDDIO input or by the I2C bus lines belongs to system resets. The hardware reset condition using the I2C signals is shown in Figure 20. When both the I2C_SCL and the I2C_SDA have a negative pulse with time of tRSTI2C, a hardware reset is generated. The result of the reset is same as a Power-On-Reset. The operating waveforms of the hardware reset using the VDDIO pin are shown in Figure 21. The VDDIO detection has a deglitch-time tVDDIODGT_F. A glitch on the VDDIO with duration less than the deglitch time will be ignored. If the pulse on the VDDIO lasts longer than the deglitch time, a reset from the VDDIO is detected to generate a reset signal. To effectively reset the 34825, the reset pulse from the VDDIO needs be longer than the 150 μs minimum reset pulse width given in the Dynamic Electrical Characteristics table. SOFTWARE RESET In addition to the two hardware reset types, the system reset has another reset source, the software reset by writing ‘1’ to the RESET bit in the Control register. The Reset bit will be cleared to ‘0’ at once since it is of W/C type. The consequence of the software reset is the same as the hardware reset. All registers will be reset. Figure 19. Sources of Reset in 34825 Figure 20. Hardware Reset Using the I2C Bus Figure 21. Hardware Reset Using the VDDIO Input INTERRUPT There are eight interrupt sources in the 34825 causing an interrupt at the INT pin to the host IC. They are accessory attachment, accessory detachment, short-key press, long key press, long-pressed key release, VBUS voltage OVP, the IC temperature OTP, and either the OVP or the OTP condition is removed. The 34825 detects each event and sets reset + - VVDDPOR VDD I 2C_SDA I 2C-Bus Reset Detection Delay Time I 2C_SCL VDDIO VDDIO Reset Detection I2C_SDA I2C_SCL Reset Condition Start Condition Stop Condition Reset 8.8~13.5ms VDDIO Reset tVDDIODGT_F |
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