34825 datasheet(26/39 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34825

FUNCTIONAL DEVICE OPERATION

I2C SERIAL BUS INTERFACE

the corresponding bit in the Interrupt register. As long as the

Interrupt register is set, the INT pin outputs low voltage. The

Interrupt register is not writable. When the Interrupt register is

read, the Interrupt register is cleared automatically. Once the

Interrupt register is cleared, the INT pin returns to high

voltage.

An interrupt mask register is provided to mask unwanted

interrupt source. When the bit of the Interrupt Mask register

is set to 1, the corresponding interrupt source is blocked. The

INT does not output low voltage even though this interrupt bit

is set in the Interrupt register.

LOGIC OUTPUT

There are two open-drain logic output pins, INT and ISET.

The INT pin is related to the interrupt sources as described in

the Interrupt section. The ISET pin is controlled by the

The ISET generally is used to control the charge current

level. A typical charger IC uses one external resistor to set

the charge current. By using ISET output, the charger IC can

use two external resistors in parallel to set two charge current

levels, as shown in Figure 27.

I2C SERIAL BUS INTERFACE

The I2C bus is enabled in the Standby, the Power Save,

and the Active modes. The serial clock (SCL) and the serial

data (SDA) lines must be connected to a positive supply

using pull-up resistors. Internally the I2C bus voltage is

referenced to the VDDIO input. The 34825 is a slave device.

Maximum data rate is 400 kbps.

ADDRESSING AND PROTOCOL

The 7-bit address for the 34825 is 0100101, as shown in

Figure 22.

Figure 22. I2C Slave Address

The following three figures show three I2C-bus transaction

protocols. The Word Address is an 8-bit register address in

the 34825.

Figure 23. Master Transmits to Slave (Write Mode)

R/W

34825 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc