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DS3170 Datasheet(PDF) 1 Page - Maxim Integrated Products |
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DS3170 Datasheet(HTML) 1 Page - Maxim Integrated Products |
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1 / 230 page  1 of 230 Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. GENERAL DESCRIPTION The DS3170 combines a DS3/E3 framer and an LIU (single-chip transceiver) to interface to a DS3/E3 physical copper line. APPLICATIONS Access Concentrators Multiservice Access Platforms (MSAPs) Routers and Switches SONET/SDH ADM Multiservice Protocol Platform (MSPPs) SONET/SDH Muxes PBXs Test Equipment PDH Multiplexer/ Demultiplexer Digital Cross Connect Integrated-Access Device (IAD) ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE DS3170 0°C to +70°C 100 CSBGA DS3170+ 0°C to +70°C 100 CSBGA DS3170N -40°C to +85°C 100 CSBGA DS3170N+ -40°C to +85°C 100 CSBGA +Denotes a lead(Pb)-free/RoHS compliant package. FUNCTIONAL DIAGRAM DS3170 DS3/E3 LINE DS3/ E3 LIU DS3/E3 FRAMER/ FORMATTER SYSTEM BACKPLANE FEATURES Single-Chip Transceiver for DS3 and E3 Performs Receive Clock/Data Recovery and Transmit Waveshaping for DS3 and E3 Jitter Attenuator can be Placed Either in the Receive or Transmit Path Interfaces to 75 Ω Coaxial Cable at Lengths Up to 380 Meters or 1246 Feet (DS3), or 440 Meters or 1443 Feet (E3) Uses 1:2 Transformers on Both Tx and Rx On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or G.832) Framer Built-In HDLC Controller with 256-Byte FIFO for the Insertion/Extraction of DS3 PMDL, G.751 Sn Bit, and G.832 NR/GC Bytes On-Chip BERT for PRBS and Repetitive Pattern Generation, Detection and Analysis Large Performance-Monitoring Counters for Accumulation Intervals of At Least 1 Second Flexible Overhead Insertion/Extraction Port for DS3, E3 Framers Loopbacks Include Line, Diagnostic, Framer, Payload, and Analog with Capabilities to Insert AIS in the Directions Away from Loopback Directions Integrated Clock Rate Adapter to Generate the Remaining Internally Required 44.736MHz (DS3) and 34.368MHz (E3) from a Single-Clock Reference Source CLAD Reference Clock can be 44.736MHz, 34.368MHz, 77.76MHz, 51.84MHz, or 19.44MHz Software Compatible with DS3171–DS3174 SCT Product Family 8-/16-Bit Parallel and Slave SPI Serial ( ≤ 10Mbps) Microprocessor Interface Low-Power (0.5W) 3.3V Operation (5V Tolerant I/O) 100-Pin Small 11mm x 11mm (1mm) CSBGA Industrial Temperature Operation: -40°C to +85°C IEEE 1149.1 JTAG Test Port PRODUCT BRIEF DS3170 DS3/E3 Single-Chip Transceiver 19-5785; Rev 2; 3/11 |
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Similar Description - DS3170 |
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