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LPC2109 Datasheet(PDF) 1 Page - NXP Semiconductors |
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LPC2109 Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 46 page ![]() 1. General description The LPC2109/2119/2129 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 64/128/256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. With their compact 64-pin package, low power consumption, various 32-bit timers, 4-channel 10-bit ADC, two advanced CAN channels, PWM channels and 46 fast GPIO lines with up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications, as well as medical systems and fault-tolerant maintenance buses. With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2109/2119/2129 will apply to devices with and without the /00 or /01 suffixes. The /00 or the /01 suffix will be used to differentiate from other devices only when necessary. 2. Features and benefits 2.1 Key features brought by LPC2109/2119/2129/01 devices Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device. They also allow for a port pin to be read at any time regardless of its function. Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are 5 V tolerant when configured for digital I/O function(s). UART0/1 include fractional baud rate generator, auto-bauding capabilities and handshake flow-control fully implemented in hardware. Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats. SPI programmable data length and master mode enhancement. Diversified Code Read Protection (CRP) enables different security levels to be implemented. This feature is available in LPC2109/2119/2129/00 devices as well. General purpose timers can operate as external event counters. 2.2 Key features common for all devices 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package. 8/16 kB on-chip SRAM. LPC2109/2119/2129 Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN Rev. 7 — 14 June 2011 Product data sheet |
Similar Part No. - LPC2109 |
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Similar Description - LPC2109 |
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