LPC1850 datasheet(77/142 Pages) NXP

77 / 142 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 2.2 — 9 September 2011

77 of 142

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

– Toggle on match.

– Do nothing on match.

• Up to two match registers can be used to generate timed DMA requests.

7.15.2 Motor control PWM

The motor control PWM is a specialized PWM supporting 3-phase motors and other

combinations. Feedback inputs are provided to automatically sense rotor position and use

that information to ramp speed up or down. An abort input is also provided that causes the

PWM to immediately release all motor drive outputs. At the same time, the motor control

PWM is highly configurable for other generalized timing, counting, capture, and compare

applications.

7.15.3 Quadrature Encoder Interface (QEI)

A quadrature encoder, also known as a 2-channel incremental encoder, converts angular

displacement into two pulse signals. By monitoring both the number of pulses and the

relative phase of the two signals, the user can track the position, direction of rotation, and

velocity. In addition, a third channel, or index signal, can be used to reset the position

counter. The quadrature encoder interface decodes the digital pulses from a quadrature

encoder wheel to integrate position over time and determine direction of rotation. In

addition, the QEI can capture the velocity of the encoder wheel.

7.15.3.1

Features

• Tracks encoder position.

• Increments/decrements depending on direction.

• Programmable for 2 or 4 position counting.

• Velocity capture using built-in timer.

• Velocity compare function with “less than” interrupt.

• Uses 32-bit registers for position and velocity.

• Three position compare registers with interrupts.

• Index counter for revolution counting.

• Index compare register with interrupts.

• Can combine index and position interrupts to produce an interrupt for whole and

partial revolution displacement.

• Digital filter with programmable delays for encoder input signals.

• Can accept decoded signal inputs (clk and direction).

7.15.4 Repetitive Interrupt (RI) timer

The repetitive interrupt timer provides a free-running 32-bit counter which is compared to

a selectable value, generating an interrupt when a match occurs. Any bits of the

timer/compare can be masked such that they do not contribute to the match detection.

The repetitive interrupt timer can be used to create an interrupt that repeats at

predetermined intervals.

7.15.4.1

Features

• 32-bit counter. Counter can be free-running or be reset by a generated interrupt.

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