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LPC1850 Datasheet(PDF) 61 Page - NXP Semiconductors |
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LPC1850 Datasheet(HTML) 61 Page - NXP Semiconductors |
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61 / 157 page ![]() LPC1850_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 3 — 6 December 2011 61 of 157 NXP Semiconductors LPC1850/30/20/10 32-bit ARM Cortex-M3 microcontroller PF_11 A2 - - 207 - 100 [6] I; PU - R — Function reserved. I U0_RXD — Receiver input for USART0. - R — Function reserved. - R — Function reserved. I/O GPIO7[25] — General purpose digital input/output pin. - R — Function reserved. O SD_VOLT2 — SD/MMC bus voltage select output 2. - R — Function reserved. I ADC1_5 — ADC1, input channel 5. Clock pins CLK0 N5 x K362 4531 [5] O; PU O EMC_CLK0 — SDRAM clock 0. O CLKOUT — Clock output pin. - R — Function reserved. - R — Function reserved. I/O SD_CLK — SD/MMC card clock. O EMC_CLK01 — SDRAM clock 0 and clock 1 combined. I/O SSP1_SCK — Serial clock for SSP1. I ENET_TX_CLK (ENET_REF_CLK) — Ethernet Transmit Clock (MII interface) or Ethernet Reference Clock (RMII interface). CLK1 T10 x - - - - [5] O; PU O EMC_CLK1 — SDRAM clock 1. O CLKOUT — Clock output pin. - R — Function reserved. - R — Function reserved. - R — Function reserved. O CGU_OUT0 — CGU spare clock output 0. - R — Function reserved. O I2S1_TX_MCLK — I2S1 transmit master clock. Table 3. Pin description …continued LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2. Symbol Description |
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