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NVT2002 Datasheet(PDF) 4 Page - NXP Semiconductors |
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NVT2002 Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 23 page ![]() NVT2001_NVT2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 26 October 2011 4 of 23 NXP Semiconductors NVT2001; NVT2002 Bidirectional voltage level translator 5.2 Pin description [1] 1-bit NVT2001 available in XSON6 package. [2] 2-bit NVT2002 available in TSSOP8, XSON8U, XSON8 packages. 6. Functional description Refer to Figure 1 “Logic diagram of NVT2001; NVT2002 (positive logic)”. 6.1 Function table [1] EN is controlled by the Vref(B) logic levels and should be at least 1 V higher than Vref(A) for best translator operation. Table 2. Pin description Symbol Pin Description NVT2001[1] NVT2002[2] GND 1 1 ground (0 V) VREFA 2 2 low-voltage side reference supply voltage for An A1 3 3 low-voltage side; connect to VREFA through a pull-up resistor A2 - 4 B1 4 6 high-voltage side; connect to VREFB through a pull-up resistor B2 - 5 VREFB 5 7 high-voltage side reference supply voltage for Bn EN 6 8 switch enable input; connect to VREFB and pull-up through a high resistor Table 3. Function selection (example) H = HIGH level; L = LOW level. Input EN[1] Function HAn = Bn L disconnect |
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