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NVT2002 Datasheet(PDF) 11 Page - NXP Semiconductors |
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NVT2002 Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 23 page ![]() NVT2001_NVT2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 26 October 2011 11 of 23 NXP Semiconductors NVT2001; NVT2002 Bidirectional voltage level translator 11. Dynamic characteristics 11.1 Open-drain drivers [1] See graphs based on Ron typical and Cio(on) +CL =50pF. Table 9. Dynamic characteristics for open-drain drivers Tamb = 40 Cto+85 C; VI(EN) =Vref(B); Rbias(ext) = 200 k; CVREFB =0.1 F; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Refer to Figure 12 tPLH LOW to HIGH propagation delay from (input) Bn to (output) An [1] Ron (CL + Cio(on))ns tPHL HIGH to LOW propagation delay from (input) Bn to (output) An Ron (CL + Cio(on))ns Fig 10. AC test setup Fig 11. Example of typical AC waveform 002aaf347 DUT EN VREFB VREFA 1.5 V 200 k Ω SIGNAL GENERATOR 5.5 V 0.1 μF 1.5 V swing 50 pF 450 Ω 500 Ω 6.6 V 1 V/div 40 ns/div 002aaf348 Bn An GND GND a. Load circuit b. Timing diagram; high-impedance scope probe used S2 = translating down, and same voltage. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; Z o =50 ; tr 2ns; tf 2ns. The outputs are measured one at a time, with one transition per measurement. Fig 12. Load circuit for outputs 002aab845 VTT RL S1 S2 (open) CL from output under test 002aab846 VIH VIL VM VM input output VOH VOL VM VM |
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