MAX11331 datasheet(23/37 Pages) MAXIM

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�� Maxim Integrated Products 23

MAX11329–MAX11332

3Msps, 12-/10-Bit, 8-/16-Channel ADCs with

Post-Mux External Signal Conditioning Access

Table 3. ADC Scan Control (continued)

SCAN3

SCAN2

SCAN1

SCAN0

MODE NAME

FUNCTION

Standard_Ext

Scans channels 0 through N

Clock mode: External clock only

Channel scan/sequence: N channels in ascending order

Channel selection: See Table 4, CHSEL[3:0] determines channel N

Averaging: No

Upper_Int

Scans channel N through the highest numbered channel. The FIFO

stores X conversion results where:

X = Channel 16–N

16-channel devices

X = Channel 8–N

8-channel devices

Clock mode: Internal clock only

Channel scan/sequence: Channel N through the highest numbered

channel in ascending order

Channel selection: See Table 4, CHSEL[3:0] determines channel N

Averaging: Can be enabled

Upper_Ext

Scans channel N through the highest numbered channel

Clock mode: External clock only

Channel scan/sequence: Channel N through the highest numbered

channel in ascending order

Channel selection: See Table 4, CHSEL[3:0] determines channel N

Averaging: No

Custom_Int

Scans preprogrammed channels in ascending order. The FIFO

stores conversion results for this unique channel sequence.

Clock mode: Internal clock only

Channel scan/sequence: Unique ascending channel sequence

Maximum depth: 16 conversions

Channel selection: See Table 12, Custom Scan0 register and Table

13, Custom Scan1 register

Averaging: Can be enabled

Custom_Ext

Scans preprogrammed channels in ascending order

Clock mode: External clock only

Channel scan/sequence: Unique ascending channel sequence

Maximum depth: 16 conversions

Channel selection: See Table 12, Custom Scan0 register and Table

13, Custom Scan1 register

Averaging: No

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