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MAX14821

IO-Link Device Transceiver

DO Fault Detection

The device registers a DoFault event when a short circuit

is present at the DO output for 440Fs. A short condition

exists when the load current on the DO driver exceeds

the 135mA (typ) DO current limit. When a short-circuit

condition is detected, the DO driver enters autoretry

mode. In autoretry mode the device periodically checks

whether the error is still present. Autoretry attempts last

for 440µs (typ) and occur every 26ms (typ). When a

DoFault error is detected, the DoFault and DoFaultInt bits

are set, IRQ asserts, and the driver is turned off 440µs

(typ) after the start of the DO faults.

Reverse-Polarity Protection

The device is protected against reverse-polarity connec-

of these pins can be connected to DC voltages up to

40V (max). A short to 40V results in a current flow of less

than 500FA.

Ensure that the maximum voltage between any of these

pins does not exceed 40V.

5V and 3.3V Linear Regulators

The device includes two internal current-limited regulators

10mA when bypassed with a 0.1µF capacitor to ground.

Add the compensation network shown in Figure 7 to draw

tected 24V supply output, or to another voltage in the 7V

to 36V range.

is disabled.

Use the LDO33Dis bit in the Mode register to enable/

disable LDO33. See the Mode Register [R1, R0] = [1,1]

tected against short circuits.

Power-Up

The C/Q and DO driver outputs and the UV output are

ages are below their respective undervoltage thresh-

olds during power-up. UV goes low and the drivers are

enabled when all these voltages exceed their respective

undervoltage-lockout thresholds.

falls below its threshold.

Undervoltage Detection

for undervoltage conditions. UV is high impedance when

any monitored voltage falls below its UVLO threshold.

UV24 and UV24Int bits are set, UV asserts high, and IRQ

asserts low.

interface is not accessible and IRQ is not available when

falls below the LDO33 undervoltage-lockout threshold,

the UV33Int bit in the Status register is set and IRQ

asserts. UV asserts if the UV33En bit in the Mode register

is set to 1.

The UV output deasserts once the undervoltage condi-

tion is removed; however, bits in the Status register and

the IRQ output are not cleared until the Status register

has been read.

Wake-Up Detection

The device detects an IO-Link wake-up condition on the

C/Q line in push-pull, high-side (PNP), or low-side (NPN)

operation modes. A wake-up condition is detected when

the C/Q output is shorted for 80Fs (typ). WU pulses low

for 190Fs (typ) when the device detects a wake-up pulse

on C/Q (Figure 5).

Set the WuIntEn bit in the Mode register to set the WuInt

bit in the Status register and generate an interrupt on

IRQ when a wake-up pulse is detected. WuInt is set

and IRQ asserts immediately after C/Q is released when

WuIntEn = 1.

MAX14821

10Ω

0.1µF

1µF

1µF

5V

LDO33

3.3V