ADS6142-HT datasheet(16/49 Pages) TI1

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SCLK

SEN

A 4

A 2

A 1

A 0

D10

REGISTERDATA

SDATA

RESET

SCLK

DSU

SLOADS

SLOADH

ADS6142-HT

SLWS234

– DECEMBER 2011

www.ti.com

Table 5. SDATA, PDN (Digital Control Pins)

SDATA

PDN

DESCRIPTION

Low

Normal operation

Low

High (AVDD)

Standby - only the ADC is powered down

High (AVDD)

Low

Output buffers are powered down, fast wake-up time

High (AVDD)

Global power down. ADC, internal reference, and output buffers are powered down, slow wake-up time

SERIAL INTERFACE

The ADC has a set of internal registers, which can be accessed through the serial interface formed by pins SEN

(Serial interface Enable), SCLK (Serial Interface Clock), SDATA (Serial Interface Data) and RESET. After device

power-up, the internal registers must be reset to their default values by applying a high-going pulse on RESET

(of width greater than 10 ns).

Serial shift of bits into the device is enabled when SEN is low. Serial data SDATA is latched at every falling edge

of SCLK when SEN is active (low). The serial data is loaded into the register at every 16th SCLK falling edge

when SEN is low. If the word length exceeds a multiple of 16 bits, the excess bits are ignored. Data is loaded in

multiples of 16-bit words within a single active SEN pulse.

The first 5 bits form the register address and the remaining 11 bits form the register data.

The interface can work with a SCLK frequency from 20 MHz down to very low speeds (a few hertz) and also with

a non-50% SCLK duty cycle.

Figure 6. Serial Interface Timing Diagram

After power-up, the internal registers must be reset to their default values. This is done in one of two ways:

1. Either through a hardware reset by applying a high-going pulse on the RESET pin (width greater than 10 ns)

as shown in Figure 6.

2. By applying a software reset. Using the serial interface, set the

<RST> bit (D4 in register 0x00) to high. This

initializes the internal registers to their default values and then self-resets the

<RST> bit to low. In this case

the RESET pin is kept low.

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