AS3668 datasheet(24/60 Pages) AMSCO

24 / 60 page

www.austriamicrosystems.com/AS3668

Revision 1.11

24 - 60

AS3668

Data Sheet - D e t a i l e d D e s c r i p t i o n

8.6.1

I²C Device Address Byte

The address byte (see Figure 30) is the first byte received following the START condition from the master device. The 7 bit device address is

0x42.

Figure 30. I²C Device Address Byte

- Bit 1 and bit 2 of the address byte are defined by the external bus connection of the slave to the master shown in chapter 8.6.3. A maxi-

mum of two devices can be connected in parallel on the same bus at one time.

- The last bit of the address byte (R/W) define the operation to be performed. When set to a 1 a read operation is selected; when set to a 0

a write operation is selected.

Following the START condition, the AS3668 monitors the I²C bus, checking the device type identifier being transmitted. Upon receiving the

address code, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.

8.6.2

Command Byte

The AS3668 operation, (see Table 29 on page 23) is determined by a command byte (see Table 31).

Figure 31. Command Byte

Figure 32. Command and Single Data Byte received by AS3668

Figure 33. Setting the Pointer to a Address Register to select a Data Register for a Read Operation

AD1

AD0

R/W

MSB

LSB

address:

MSB

LSB

From Master to Slave

From Slave to Master

Command Byte

Data Byte

Slave Address

Acknowledge

from AS3668

Acknowledge

from AS3668

Acknowledge

from AS3668

R/W

AS3668 Registers

Autoincrement

Memory Word

Address

1 Byte

From Master to Slave

From Slave to Master

Command Byte

Slave Address

Acknowledge

from AS3668

Acknowledge

from AS3668

R/W

AS3668 Registers

AS3668 Datasheet(PDF) 24 Page - ams AG

AS3668 Datasheet(HTML) 24 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Download

Link URL