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AS3668 Datasheet(PDF) 43 Page - ams AG |
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AS3668 Datasheet(HTML) 43 Page - ams AG |
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43 / 60 page ![]() www.austriamicrosystems.com/AS3668 Revision 1.11 43 - 60 AS3668 Data Sheet - D e t a i l e d D e s c r i p t i o n Table 41. Pattern Start Control Register 0x1b Pattern Start Control Register Bit Bit Name Default Access Bit Description 2 pattern_phase_out 0 R/W The bit defines the way how a pattern is being stopped when the pattern_enable register is cleared. If the bit is set to 0 and the pattern_enable register is cleared the running pattern stops immediately. If the bit is set to 1 and the pattern_enable is cleared the pattern finishes the running frame and stops afterwards. 0: Stop pattern immediately 1: Phase-out pattern 1 pattern_enable 0 W Starts the pattern generation on current sources. 0: Pattern generation off 1: Start of pattern generation 0 pattern_start_src 1 R/W Selects the input source to trigger the pattern generation start. 0: Pattern enable by software bit 1: pattern enable by GPIO/AUDIO_IN Table 42. Pattern Frame Start Delay Register 0x1c Pattern Frame Start Delay Register Bit Bit Name Default Access Bit Description 7:6 frame_delay4 0 R/W Defines the start delay of CURR4 in pattern generation mode. Note that changes in this register are only getting active after a restart of the pattern generation unit by toggling the pattern_enable bit. 00: No start delay for CURR4 01: 1 frame start delay for CURR4 10: 2 frames start delay for CURR4 11: 3 frames start delay for CURR4 5:4 frame_delay3 0 R/W Defines the start delay of CURR3 in pattern generation mode. Note that changes in this register are only getting active after a restart of the pattern generation unit by toggling the pattern_enable bit. 00: No start delay for CURR3 01: 1 frame start delay for CURR3 10: 2 frames start delay for CURR3 11: 3 frames start delay for CURR3 3:2 frame_delay2 0 R/W Defines the start delay of CURR2 in pattern generation mode. Note that changes in this register are only getting active after a restart of the pattern generation unit by toggling the pattern_enable bit. 00: No start delay for CURR2 01: 1 frame start delay for CURR2 10: 2 frames start delay for CURR2 11: 3 frames start delay for CURR2 1:0 frame_delay1 0 R/W Defines the start delay of CURR1 in pattern generation mode. Note that changes in this register are only getting active after a restart of the pattern generation unit by toggling the pattern_enable bit. 00: No start delay for CURR1 01: 1 frame start delay for CURR1 10: 2 frames start delay for CURR1 11: 3 frames start delay for CURR1 |
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