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TLC320AD55CDW Datasheet(PDF) 28 Page - Texas Instruments |
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TLC320AD55CDW Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 41 page ![]() 4–2 4.4 Electrical Characteristics, TA = 25°C, VDD(ADC) = VDD(DAC) = DVDD = 5 V, MCLK = 16.384 MHz, Fk = 8 (unless otherwise noted) 4.4.1 Digital Inputs and Outputs, Outputs Not Loaded PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOH High-level output voltage, DOUT IO = 360 µA 2.4 4.6 V VOL Low-level output voltage, DOUT IO = 2 mA 0.2 0.4 V IIH High-level input current, any digital input VIH = 5 V 10 µA IIL Low-level input current, any digital input VIL = 0.8 V 10 µA Ci Input capacitance 5 pF Co Output capacitance 5 pF 4.4.2 ADC Path Filter (see Note 3) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 20 Hz – 0.5 – 0.15 0.2 200 Hz – 0.5 0.03 0.15 300 Hz to 3 kHz – 0.15 0 0.15 Filter gain relative to gain at 1020 Hz 3.3 kHz – 0.35 – 0.5 0.3 dB 3.4 kHz –1 – 0.6 – 0.1 4 kHz –20 –14 ≥ 4.6 kHz –40 NOTE 3: The filter gain outside of the passband is measured with respect to the gain at 1020 Hz. The analog input test signal is a sine wave with 0 dB = 6 VI(PP) as the reference level for the analog input signal. The passband is 0 to 3400 Hz. 4.4.3 ADC Dynamic Performance 4.4.3.1 ADC Signal-to-Noise (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI = – 1 dB 80 85 VI = – 9 dB 72 77 Signal-to-noise ratio (SNR) VI = – 40 dB 40 45 dB VI = – 65 dB 14 21 VI(AUXM, AUXP) = – 9 dB 72 78 NOTE 4: The test condition is the digital equivalent of a 1020 Hz input signal with an 8 kHz conversion rate. The load impedance is 600 Ω. Input and output voltages are referred to VDD/2. 4.4.3.2 ADC Signal-to-Distortion (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI = – 1 dB 80 92 VI = – 9 dB 80 94 Signal-to-total harmonic distortion (THD) VI = – 40 dB 40 60 dB VI = – 65 dB 15 40 VI(AUXM, AUXP) = – 9 dB 80 92 NOTE 4: The test condition is the digital equivalent of a 1020 Hz input signal with an 8 kHz conversion rate. The load impedance is 600 Ω. Input and output voltages are referred to VDD/2. |
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