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WM8310 Datasheet(PDF) 172 Page - Wolfson Microelectronics plc |
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WM8310 Datasheet(HTML) 172 Page - Wolfson Microelectronics plc |
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172 / 291 page ![]() WM8310 Pre-Production w PP, May 2012, Rev 3.1 172 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 2:0 WDOG_TO [2:0] 111 Watchdog timeout period 000 = 0.256s 001 = 0.512s 010 = 1.024s 011 = 2.048s 100 = 4.096s 101 = 8.192s 110 = 16.384s 111 = 32.768s Protected by security key. Register 4004h Watchdog REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R16389 (4005h) ON Pin Control 9:8 ON_PIN_SECA CT [1:0] 01 Secondary action of ON pin (taken after 1 timeout period) 00 = Interrupt 01 = ON request 10 = OFF request 11 = Reserved Protected by security key. 5:4 ON_PIN_PRIM ACT [1:0] 00 Primary action of ON pin 00 = Ignore 01 = ON request 10 = OFF request 11 = Reserved Note that an Interrupt is always raised. Protected by security key. 3 ON_PIN_STS 0 Current status of ON pin 0 = Asserted (logic 0) 1 = Not asserted (logic 1) 1:0 ON_PIN_TO [1:0] 00 ON pin timeout period 00 = 1s 01 = 2s 10 = 4s 11 = 8s Protected by security key. Register 4005h ON Pin Control REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R16390 (4006h) Reset Control 15 RECONFIG_A T_ON 1 Selects if the bootstrap configuration data should be reloaded when an ON transition is scheduled 0 = Disabled 1 = Enabled Protected by security key. 13 WALL_FET_E NA_DRV_STR 0 Sets the drive strength of the WALLFETENA pin. (Note this pin is Active Low.) 0 = Weak drive (500kOhm) 1 = Strong drive (50kOhm) |
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