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WM8311 Datasheet(PDF) 161 Page - Wolfson Microelectronics plc

Part # WM8311
Description  Processor Power Management Subsystem
PDF  302 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8311 Datasheet(HTML) 161 Page - Wolfson Microelectronics plc

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Pre-Production
WM8311
w
PP, May 2012, Rev 3.1
161
23.2.12 OTP MEMORY INTERRUPTS
The primary OTP_INT interrupt comprises two secondary interrupts as described in Section 14.5. The
secondary interrupt bits are defined in Table 102.
Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt
event is masked and does not trigger a OTP_INT interrupt. The secondary interrupt bits in R16402
(4012h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked
by default.
ADDRESS
BIT
LABEL
DESCRIPTION
R16402
(4012h)
Interrupt Status
2
5
OTP_CMD_END_EINT
OTP / ICE Command End interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
4
OTP_ERR_EINT
OTP / ICE Command Fail interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
R16410
(401Ah)
Interrupt Status
2 Mask
5
IM_OTP_CMD_END_EINT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
4
IM_OTP_ERR_EINT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Table 102 OTP Memory Interrupts
23.2.13 RESERVED
23.2.14 BATTERY CHARGER INTERRUPTS
The primary CHG_INT interrupt comprises six secondary interrupts as described in Section 17.7.8.
The secondary interrupt bits are defined in Table 103.
Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt
event is masked and does not trigger a CHG_INT interrupt. The secondary interrupt bits in R16402
(4012h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked
by default.
ADDRESS
BIT
LABEL
DESCRIPTION
R16402
(4012h)
Interrupt Status
2
15
CHG_BATT_HOT_EINT
Battery Hot interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
14
CHG_BATT_COLD_EINT
Battery Cold interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
13
CHG_BATT_FAIL_EINT
Battery Fail interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
12
CHG_OV_EINT
Battery Overvoltage interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
11
CHG_END_EINT
Battery Charge End interrupt (End of
Charge Current threshold reached)
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.



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