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WM8311 Datasheet(PDF) 159 Page - Wolfson Microelectronics plc

Part # WM8311
Description  Processor Power Management Subsystem
PDF  302 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8311 Datasheet(HTML) 159 Page - Wolfson Microelectronics plc

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Pre-Production
WM8311
w
PP, May 2012, Rev 3.1
159
ADDRESS
BIT
LABEL
DESCRIPTION
R16401
(4011h)
Interrupt Status
1
8
AUXADC_DATA_EINT
AUXADC Data Ready interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
7:4
AUXADC_DCOMPn_EINT
AUXADC Digital Comparator n interrupt
(Trigger is controlled by DCMPn_GT)
Note: Cleared when a ‘1’ is written.
R16409
(4019h)
Interrupt Status
1 Mask
8
IM_AUXADC_DATA_EINT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
7:4
IM_AUXADC_DCOMPn_EI
NT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Note: n is a number between 1 and 4 that identifies the individual Comparator.
Table 98 AUXADC Interrupts
23.2.9 POWER PATH MANAGEMENT INTERRUPTS
The primary PPM_INT interrupt comprises three secondary interrupts as described in Section 17.5.
The secondary interrupt bits are defined in Table 99.
Each of the secondary interrupts can be masked. When a mask bit is set, the corresponding interrupt
event is masked and does not trigger a PPM_INT interrupt. The secondary interrupt bits in R16401
(4011h) are valid regardless of whether the mask bit is set. The secondary interrupts are all masked
by default.
ADDRESS
BIT
LABEL
DESCRIPTION
R16401
(4011h)
Interrupt Status
1
15
PPM_SYSLO_EINT
Power Path SYSLO interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
14
PPM_PWR_SRC_EINT
Power Path Source interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
13
PPM_USB_CURR_EINT
Power Path USB Current interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
R16409
(4019h)
Interrupt Status
1 Mask
15
IM_PPM_SYSLO_EINT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
14
IM_PPM_PWR_SRC_EINT
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
13
IM_PPM_USB_CURR_EIN
T
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Table 99 Power Path Management Interrupts



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