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WM8351 Datasheet(PDF) 302 Page - Wolfson Microelectronics plc |
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WM8351 Datasheet(HTML) 302 Page - Wolfson Microelectronics plc |
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302 / 330 page ![]() WM8351 Production Data w PD, April 2012, Rev 4.5 302 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R202 (CAh) LDO1 Low Power 13:12 LDO1_HIB_MODE[1:0] 00 LDO1 Hibernate behaviour: 00 = Select voltage image settings 01 = disable output 10 = reserved 11 = reserved Reset by state machine. Default held in metal mask. 9:8 LDO1_HIB_TRIG[1:0] 00 LDO1 Hibernate signal select 00 = Hibernate register bit 01 = L_PWR1 10 = L_PWR2 11 = L_PWR3 Reset by state machine. Default held in metal mask. 4:0 LDO1_VIMG[4:0] 1_1100 LDO1 Regulator output image voltage 1 1111 = 3.3V … (100mV steps) 1 0000 = 1.8V 0 1111 = 1.65V … (50mV steps) 0 0000 = 0.9V Register CAh LDO1 Low Power REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R203 (CBh) LDO2 Control 14 LDO2_SWI 0 LDO2 Regulator mode 0 = LDO voltage regulator 1 = Current-limited switch (no voltage regulation, LDO2_VSEL has no effect) Reset by state machine. Default held in metal mask. 10 LDO2_OPFLT 0 Enable discharge of LDO2 outputs when LDO2 is disabled 0 = Enabled - Output to be discharged 1 = Disabled - Output is left floating Note - if LDO Regulators 1, 2, 3 and 4 are all disabled, then the outputs will all be discharged, regardless of the LDOn_OPFLT bit. 4:0 LDO2_VSEL[4:0] 1_1011 1_0000 1_0000 1_0110 LDO2 Regulator output voltage (when LDO2_SWI=0) 1 1111 = 3.3V … (100mV steps) 1 0000 = 1.8V 0 1111 = 1.65V … (50mV steps) 0 0000 = 0.9V Reset by state machine. Default held in metal mask. Register CBh LDO2 Control |
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