AD7715 datasheet(21/31 Pages) AD

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AD7715

–21–

REV. C

Measurement errors due to offset drift or gain drift can be elimi-

nated at any time by recalibrating the converter. Using the sys-

tem calibration mode can also minimize offset and gain errors in

the signal conditioning circuitry. Integral and differential linear-

ity errors are not significantly affected by temperature changes.

POWER SUPPLIES

There is no specific power sequence required for the AD7715;

either the AVDD or the DVDD supply can come up first. While

the latch-up performance of the AD7715 is good, it is important

that power is applied to the AD7715 before signals at REF IN,

AIN or the logic input pins in order to avoid excessive currents.

If this is not possible, then the current which flows in any of

these pins should be limited. If separate supplies are used for

the AD7715 and the system digital circuitry, then the AD7715

should be powered up first. If it is not possible to guarantee

this, then current limiting resistors should be placed in series

with the logic inputs to again limit the current.

During normal operation the AD7715 analog supply (AVDD)

should always be greater than or equal to its digital supply (DVDD).

Supply Current

The current consumption on the AD7715 is specified for sup-

plies in the range +3 V to +3.6 V and in the range +4.75 V to

+5.25 V. The part operates over a +2.85 V to +5.25 V supply

range and the IDD for the part varies as the supply voltage varies

over this range. Figure 5 shows the variation of the typical

IDD with VDD voltage for both a 1 MHz external clock and a

2.4576 MHz external clock at +25

°C. The AD7715 is operated

in unbuffered mode. The relationship shows that the IDD is

minimized by operating the part with lower VDD voltages. IDD

on the AD7715 is also minimized by using an external master

clock or by optimizing external components when using the on-

chip oscillator circuit.

SUPPLY VOLTAGE (AVDD & DVDD) – Volts

2.85

0.9

1.0

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

3.15

3.45

4.05

4.35

4.65

4.95

5.25

3.75

MCLK IN = 2.4576MHz

MCLK IN = 1MHz

Figure 5. IDD vs. Supply Voltage

Grounding and Layout

Since the analog inputs and reference input are differential,

most of the voltages in the analog modulator are common-mode

voltages. The excellent common-mode rejection of the part will

remove common-mode noise on these inputs. The analog and

digital supplies to the AD7715 are independent and separately

pinned out to minimize coupling between the analog and digital

sections of the device. The digital filter will provide rejection of

broadband noise on the power supplies, except at integer mul-

tiples of the modulator sampling frequency. The digital filter

also removes noise from the analog and reference inputs pro-

vided those noise sources do not saturate the analog modulator.

As a result, the AD7715 is more immune to noise interference

that a conventional high resolution converter. However, because

the resolution of the AD7715 is so high and the noise levels

from the AD7715 so low, care must be taken with regard to

grounding and layout.

The printed circuit board which houses the AD7715 should be

designed such that the analog and digital sections are separated

and confined to certain areas of the board. This facilitates the

use of ground planes which can be separated easily. A minimum

etch technique is generally best for ground planes as it gives the

best shielding. Digital and analog ground planes should only be

joined in one place. If the AD7715 is the only device requiring

an AGND to DGND connection, then the ground planes

should be connected at the AGND and DGND pins of the

AD7715. If the AD7715 is in a system where multiple devices

require AGND to DGND connections, the connection should

still be made at one point only, a star ground point which

should be established as close as possible to the AD7715.

Avoid running digital lines under the device as these will couple

noise onto the die. The analog ground plane should be allowed

to run under the AD7715 to avoid noise coupling. The power

supply lines to the AD7715 should use as large a trace as pos-

sible to provide low impedance paths and reduce the effects of

glitches on the power supply line. Fast switching signals like

clocks should be shielded with digital ground to avoid radiating

noise to other sections of the board and clock signals should

never be run near the analog inputs. Avoid crossover of digital

and analog signals. Traces on opposite sides of the board should

run at right angles to each other. This will reduce the effects of

feedthrough through the board. A microstrip technique is by far

the best but is not always possible with a double-sided board. In

this technique, the component side of the board is dedicated to

ground planes while signals are placed on the solder side.

Good decoupling is important when using high resolution

ADCs. All analog supplies should be decoupled with 10

µF

tantalum in parallel with 0.1

µF capacitors to AGND. To

achieve the best from these decoupling components, they must

be placed as close as possible to the device, ideally right up

against the device. All logic chips should be decoupled with

0.1

µF disc ceramic capacitors to DGND. In systems where a

common supply voltage is used to drive both the AVDD and

DVDD of the AD7715, it is recommended that the system’s

AVDD supply is used. This supply should have the recom-

mended analog supply decoupling capacitors between the AVDD

pin of the AD7715 and AGND and the recommended digital

supply decoupling capacitor between the DVDD pin of the

AD7715 and DGND.

Evaluating the AD7715 Performance

The recommended layout for the AD7715 is outlined in the

evaluation board for the AD7715. The evaluation board pack-

age includes a fully assembled and tested evaluation board,

documentation, software for controlling the board over the

printer port of a PC and software for analyzing the AD7715’s

performance on the PC. For the AD7715-5, the evaluation

board order number is EVAL-AD7715-5EB and for the

AD7715-3, the order number is EVAL-AD7715-3EB.

Noise levels in the signals applied to the AD7715 may also

affect performance of the part. The AD7715 software evaluation

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