AD8309 datasheet(17/20 Pages) AD

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REV. B

AD8309

–17–

Table II.

Slope

Intercept R1

VOUT (V) at

mV/dB dBV

–88 dBV +12 dBV

–102

3.92 8.87 O/C 1

0.56

4.56

–103

1.05 9.53 O/C 1

0.75

5.75

–90

3.92 8.87 20.5 1.05

0.08

4.08

–90

1.05 9.53 15.4 1.07

0.1

5.10

Setting the Limiter Output Level

The limiter output is a pair of differential currents of magni-

tude, IOUT, from high impedance (open-collector) sources.

These are converted to equal-amplitude voltages by supply-

referenced load resistors, RLOAD. The limiter output current is

set by RLIM, the resistor connected between Pin 9 (LMDR) and

ground depending on the application, the resulting voltage may

be used in a fully balanced or unbalanced manner. It is good

practice to retain the both resistors, whichever output mode is

used. The unbalanced, or single sided mode, is more inclined to

result in instabilities caused by the very high gain of the signal

path. If the limiter output is not needed, LMDR should be left

open with LMHI and LMLO being tied to VPS2.

The limiter output current is set by the equation:

IOUT = –400 mV/RLIM

and has an absolute accuracy of

±5%.

The voltage on each of the limiter pins will be given by:

VLIM = VS – 400 mV × RLOAD/RLIM

The limiter current may be set as high as 10 mA, which requires

RLIM to be 40 ohms, and can be optionally increased somewhat

beyond this level. It is inadvisable, however, to use high bias

currents, since the gain of this wide bandwidth signal path is

proportional to it, and the risk of instability is elevated as RLIM is

reduced (recommended value is 400

Ω).

The limiter output is specified for input levels between –78 dBV

and +9 dBV. The output of the limiter will be unstable for levels

below –78 dBV (–65 dBm).

High Output Limiter Loading

The AD8309 can generate a fairly large output power at its

differential limiter output interface. This may be coupled into a

Ω grounded load using the narrow-band coupling network

following similar lines to those provided for input matching.

Alternatively, a flux-linked transformer, having a center-tapped

primary, may be used. Even higher output powers can be ob-

tained using emitter-followers. In Figure 38, the supply voltage

to the AD8309 is dropped from 5 V to about 4.2 V, by the

diode. This increases the available swing at each output to about

2 V. Taking both outputs differentially, a square wave output of

4 V p-p can be generated.

VLOG

VPS2

PADL

LMHI

LMLO

PADL

FLTR

LMDR

COM2

VPS1

PADL

INHI

INLO

PADL

COM1

ENBL

AD8309

0.1 F

RLIM

RSSI

3V TO 5V

0.1 F

+5V

IN914

APPROX. 4.2V

RLOAD

SET RL = 5*RLIM

5V TO 3V

DIFFERENTIAL

OUTPUT = 4V pk-pk

RLOAD

Figure 38. Increasing Limiter Output Voltage

When operating at high output power levels and high frequen-

cies, very careful attention must be paid to the issue of stability.

Oscillation is likely to be observed when the input signal level is

low, due to the extremely high gain-bandwidth product of the

AD8309 under such conditions. These oscillations will be less

evident when signal-balancing networks are used, operating at

frequencies below 200 MHz, and they will generally be fully

quenched by the signal at input levels of a few dB above the

noise floor.

VLOG

VPS2

PADL

LMHI

LMLO

PADL

FLTR

LMDR

COM2

VPS1

PADL

INHI

INLO

PADL

COM1

ENBL

AD8309

0.1 F

VR2

10k

INT

INPUT

VR1

SLOPE

33.2k

1.96k

AD8031

GND

RSSI

AD8309 SUPPLY DROPPED TO 3V

RD = (VS –3V)/25mA

0.1 F

Figure 37. Buffered RSSI Output with Slope and Intercept Adjustments

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