AD8309 datasheet(18/20 Pages) AD

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REV. B

AD8309

–18–

Modulated Limiter Output

The limiter output stage of the AD8309 also provides an analog

multiplication capability: the amplitude of the output square

wave can be controlled by the current withdrawn from LMDR

(Pin 9). An analog control input of 0 V to +1 V is used to gener-

ate an exactly-proportional current of 0 mA to 10 mA in the npn

transistor, whose collector is held at a fixed voltage of

∼400 mV

by the internal bias in the AD8309. When the input signal is

above the limiting threshold, the output will then be a square-

wave whose amplitude is proportional to the control bias.

VLOG

VPS2

PADL

LMHI

LMLO

PADL

FLTR

LMDR

COM2

VPS1

PADL

INHI

INLO

PADL

COM1

ENBL

AD8309

1.8k

AD8031

0.1 F

RSSI

0.1 F

VARIABLE

OUTPUT

8.2k

0V TO +1V

0mA TO

10mA

2N3904

0.1 F

Figure 39. Variable Limiter Output Programming

Effect of Waveform Type on Intercept

The AD8309 fundamentally responds to voltage and not to

power. A direct consequence of this characteristic is that input

signals of equal rms power, but differing crest factors, will pro-

duce different results at the log amp’s output.

The effect of differing signal waveforms is to shift the effective

value of the log amp’s intercept. Graphically, this looks like a

vertical shift in the log amp’s transfer function. The device’s

logarithmic slope however is not affected. For example, consider

the case of the AD8309 being alternately fed by an unmodu-

lated sine wave and by a single CDMA channel of the same rms

power. The AD8309’s output voltage will differ by the equiva-

lent of 3.55 dB (71 mV) over the complete dynamic range of the

device (the output for a CDMA input being lower).

Table III shows the correction factors that should be applied to

measure the rms signal strength of a various signal types. A sine

wave input is used as a reference. To measure the rms power of

a square wave, for example, the mV equivalent of the dB value

given in the table (20 mV/dB times 3.01 dB) should be sub-

tracted from the output voltage of the AD8309.

Table III. Shift in AD8309 Output for Signals with Differing

Crest Factors

Correction Factor

Signal Type

(Add to Output Reading)

Sine Wave

0 dB

Square Wave or DC

–3.01 dB

Triangular Wave

+0.9 dB

GSM Channel (All Time Slots On) +0.55 dB

CDMA Channel

+3.55 dB

PDC Channel (All Time Slots On) +0.58 dB

Gaussian Noise

+2.51 dB

Evaluation Board

An evaluation board, carefully laid out and tested to demon-

strate the specified high speed performance of the AD8309 is

available. Figure 40 shows the schematic of the evaluation board

which fairly closely follows the basic connections schematic

shown in Figure 30. For ordering information, please refer to

the Ordering Guide. Links, switches and component settings for

different setups are described in Table IV.

VLOG

VPS2

PADL

LMHI

LMLO

PADL

FLTR

LMDR

COM2

VPS1

PADL

INHI

INLO

PADL

COM1

ENBL

AD8309

0.1 F

R/L

52.3

0.01 F

4.7

+VS

EXT

ENABLE

C7 (OPEN)

402

0.1 F

402

4.7

(OPEN)

VRSSI

+VS

(OPEN)

0.01 F

LMHI

0.01 F

LMLO

LK1

402

SIG

INHI

SIG

INLO

Figure 40. Evaluation Board Schematic

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