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ADV7182 Datasheet(PDF) 13 Page - Analog Devices

Part # ADV7182
Description  10-Bit, SDTV Video Decoder with Differential Inputs
PDF  96 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7182 Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
ADV7182
Rev. A | Page 13 of 96
ANALOG FRONT END
Figure 8. Manual Muxing
INPUT CONFIGURATION
The following two steps are key for configuring the ADV7182 to
correctly decode the input video.
1.
Use INSEL[4:0] to configure the routing and format decoding
(CVBS, Y/C, or YPrPb).
2.
If the input requirements are not met using the INSEL[4:0]
options, the analog input muxing section must be configured
manually to correctly route the video from the analog
input pins to the ADC. The standard definition processor
block, which decodes the digital data, should be configured
to process the CVBS, Y/C, or YPrPb format. This is performed
by INSEL[4:0] selection.
INSEL[4:0], Input Control, Address 0x00[4:0]
The INSEL bits allow the user to select the input format. They also
configure the standard definition processor core to process CVBS,
differential CVBS, S-Video (Y/C), or component (YPrPb) format.
INSEL[4:0] has predefined analog input routing schemes that
do not require manual mux programming (see Table 9). This
allows the user to route the various video signal types to the
decoder and select them using INSEL[4:0] only. The added
benefit is that if, for example, the CVBS input is selected, the
remaining channels are powered down.
Table 9. INSEL[4:0]
INSEL[4:0]
Video Format
Analog Input
00000
CVBS
CVBS input on AIN1
00001
CVBS
CVBS input on AIN2
00010
CVBS
CVBS input on AIN3
00011
CVBS
CVBS input on AIN4
01000
Y/C (S-Video)
Y input on AIN1
C input on AIN2
01001
Y/C (S-Video)
Y input on AIN3
C input on AIN4
01100
YPrPb
Y input on AIN1
Pb input on AIN2
Pr input on AIN3
01110
Differential CVBS
Positive on AIN1
Negative on AIN2
01111
Differential CVBS
Positive on AIN3
Negative on AIN4
ANALOG INPUT MUXING
The ADV7182 has an integrated analog muxing section that
allows more than one source of video signal to be connected to
the decoder.
A maximum of four CVBS inputs can be connected to and
decoded by the ADV7182. As shown in the Pin Configuration and
Function Description section, these analog input pins lie in close
proximity to one another, which requires careful design of the PCB
layout. For example, route ground shielding between all signals
through tracks that are physically close together. It is strongly
recommended that any unused analog input pins be connected
to AGND to act as a shield.
AIN1
AIN2
AIN3
AIN4
AIN4
AIN2
MAN_MUX_EN
MUX_0[3:0]
MUX_3[3:0]
AIN2
AIN4
MUX_1[3:0]
AIN2
AIN3
MUX_2[3:0]
ADC



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