HT66F20 datasheet(243/298 Pages) HOLTEK

243 / 298 page

Rev. 1.90

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Rev. 1.90

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HT66F20/HT66F30/HT66F40/HT66F50/HT66F60

HT66FU30/HT66FU40/HT66FU50/HT66FU60

Enhanced A/D Flash Type 8-Bit MCU with EEPROM

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60

HT66FU30/HT66FU40/HT66FU50/HT66FU60

Enhanced A/D Flash Type 8-Bit MCU with EEPROM

Toinitiateadatatransaction,theMCUmasterSPIneedstopullSCStoalowlevelfirstandthen

alsopullSCKlow.TheinputdatabitonSDIshouldbestablebeforethenextSCKrisingedge,as

thedevicewilllatchtheSDIstatusonthenextSCKrisingedge.RegardingtheSDOline,theoutput

databitwillbeupdatedontheSCKfallingedge.Themasterneedstoobtainthelinestatusbefore

thenextSCKfallingedge.

Thereare16bitsofdatatransmittedand/orreceivedbytheSPIinterfaceforeachtransaction.Each

transactionconsistsofacommandphaseandadataphase.WhenSCSishigh,theSPIinterfaceis

disabledandSDOwillbesettoahighimpedancestate.

Afteracompletetransactionhasbeenimplemented,whichrequires16SCKclockcycles,themaster

needstosetSCStoahighlevelinpreparationforthenextdatatransaction.

Forwriteoperations,thedevicewillbegintoexecutethecommandonlyafteritreceivesa16-bit

serialdatasequenceandwhentheSCShasbeensethighagainbythemaster.

Forreadoperations,thedevicewillbegintoexecutethecommandonlyafteritreceivesan8-bit

readcommandafterwhichitwillbereadytooutputdata.Ifnecessary,themastercande-assertthe

SCSpintoabortthetransactionatanytimewhichwillcauseanydatatransactionstobeabandoned.

UART Module External Pin Interfacing

Tocommunicatewithanexternalserialinterface,theinternalUARThastwoexternalpinsknownas

TXandRX.TheTXpinistheUARTtransmitterserialdataoutputpinifthecorrespondingcontrol

bitsnamedUARTENinUCR1registerandTXENinUCR2registeraresetto1.Ifthecontrolbit

UARTENorTXENisequaltozero,theTXpinisinthestateofhighimpedance.Similarly,theRX

pinistheUARTreceiverserialdatainputpinifthecorrespondingcontrolbitsnamedUARTENand

RXENinUCR1andUCR2registersaresetto1.IfthecontrolbitUARTENorRXENisequalto

zero,theRXpinisinthestateofhighimpedance.

UART Data Transfer Scheme

ThefollowingblockdiagramshowstheoveralldatatransferstructurearrangementfortheUART.

TheactualdatatobetransmittedfromtheMCUisfirsttransferredtotheTXRregisterbythe

applicationprogram.ThedatawillthenbetransferredtotheTransmitterShiftRegisternamedTSR

fromwhereitwillbeshiftedout,LSBfirst,ontotheTXpinataratecontrolledbytheBaudRate

Generator.OnlytheTXRregisterisaccessibletotheapplicationprogram,theTransmitterShift

RegisterisnotmappedintotheDataMemoryareaandisinaccessibletotheapplicationprogram.

DatatobereceivedbytheUARTisacceptedontheexternalRXpin,fromwhereitisshiftedin,

LSBfirst,totheReceiverShiftRegisternamedRSRataratecontrolledbytheBaudRateGenerator.

Whentheshiftregisterisfull,thedatawillthenbetransferredfromtheshiftregistertotheinternal

RXRregister,whereitisbufferedandcanbemanipulatedbytheapplicationprogram.Onlythe

RXRregisterisaccessibletotheapplicationprogram,theReceiverShiftRegisterisnotmapped

intotheDataMemoryareaandisinaccessibletotheapplicationprogram.Itshouldbenotedthatthe

actualregisterfordatatransmissionandreception,althoughreferredtointhetext,andinapplication

programs,asseparateTXRandRXRregisters,onlyexistsasasinglesharedregisterphysically.This

sharedregisterknownastheTXR/RXRregisterisusedforbothdatatransmissionanddatareception.

HT66F20 Datasheet(PDF) 243 Page - Holtek Semiconductor Inc

HT66F20 Datasheet(HTML) 243 Page - Holtek Semiconductor Inc

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