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82576EB Datasheet(PDF) 20 Page - Intel Corporation

Part # 82576EB
Description  Intel짰 82576EB Gigabit Ethernet Controller Specification Update
PDF  34 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82576EB Datasheet(HTML) 20 Page - Intel Corporation

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Specification Changes - Intel® 82576EB GbE Controller
Intel® 82576EB GbE Controller
Revision: 2.85
Specification Update
September 2012
20
1. Disable the receiver by clearing RCTL.RXEN.
2. Disable the transmitter by clearing TCTL.EN.
3. Ensure Smart Power Down is not enabled in the PHY. EEPROM word 0xF bit 1 or PHY register 25d bit
0.
4. Verify the 8276 has stopped processing outstanding cycles and is idle.
5. Set CTRL.SPEED=10, CTRL.FRCSPD=1, CTRL_EXT.SPD_BYPS=1.
6. Modify LINK mode to SerDes or SGMII by setting CTRL_EXT.LINK_MODE to 11b or 10b,
respectively.
7. Delay a minimum of 10-20µs
8. Clear CTRL.FRCSPD, CTRL_EXT.SPD_BYPS
9. Set up the link as described in Section 4.6.7.3, MAC/SERDES Link Setup (CTRL_EXT.LINK_MODE =
11b)* or Section 4.6.7.4, MAC/SGMII Link Setup (CTRL_EXT.LINK_MODE = 10b)*.
10. Set up Tx and Rx queues and enable Tx and Rx processes.
*Links can change in a specific Datasheet revision. Use the links provided by the revision you are using.
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7. CRC8 Fields of Analog Initialization Structures in the EEPROM Image are not Checked by the Device
Change:
See the “SerDes/PHY/PCIe/PLL/CCM Initialization Structures” section in Chapter 6 of the
Datasheet. This section describes analog initialization structures. The CRC8 fields of these
structures are not checked by the device.
The CRC_DIS EEPROM bit (word 0x23, bit 6) must be set to 1b.
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