DP83848JSQ datasheet(49/80 Pages) TI

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7.2 EXTENDED REGISTERS

7.2.1 PHY Status Register (PHYSTS)

This register provides a single location within the register set for quick access to commonly accessed information.

Table 21. PHY Status Register (PHYSTS), address 0x10

Bit

Bit Name

Default

Description

RESERVED

0, RO

RESERVED: Write ignored, read as 0.

MDI-X mode

0, RO

MDI-X mode as reported by the Auto-Negotiation logic:

This bit will be affected by the settings of the MDIX_EN and

FORCE_MDIX bits in the PHYCR register. When MDIX is enabled,

but not forced, this bit will update dynamically as the Auto-MDIX al-

gorithm swaps between MDI and MDI-X configurations.

1 = MDI pairs swapped

(Receive on TPTD pair, Transmit on TPRD pair)

0 = MDI pairs normal

(Receive on TRD pair, Transmit on TPTD pair)

Receive Error Latch

0, RO/LH

Receive Error Latch:

This bit will be cleared upon a read of the RECR register.

1 = Receive error event has occurred since last read of RXERCNT

(address 0x15, Page 0).

0 = No receive error event has occurred.

Polarity Status

0, RO

Polarity Status:

This bit is a duplication of bit 4 in the 10BTSCR register. This bit will

be cleared upon a read of the 10BTSCR register, but not upon a

read of the PHYSTS register.

1 = Inverted Polarity detected.

0 = Correct Polarity detected.

False Carrier Sense

Latch

0, RO/LH

False Carrier Sense Latch:

This bit will be cleared upon a read of the FCSR register.

1 = False Carrier event has occurred since last read of FCSCR (ad-

dress 0x14).

0 = No False Carrier event has occurred.

Signal Detect

0, RO/LL

100Base-TX unconditional Signal Detect from PMD.

Descrambler Lock

0, RO/LL

100Base-TX Descrambler Lock from PMD.

Page Received

0, RO

Link Code Word Page Received:

This is a duplicate of the Page Received bit in the ANER register,

but this bit will not be cleared upon a read of the PHYSTS register.

1 = A new Link Code Word Page has been received. Cleared on

read of the ANER (address 0x06, bit 1).

0 = Link Code Word Page has not been received.

RESERVED

0, RO

RESERVED: Writes ignored, read as 0.

Remote Fault

0, RO

Remote Fault:

1 = Remote Fault condition detected (cleared on read of BMSR (ad-

dress 01h) register or by reset). Fault criteria: notification from Link

Partner of Remote Fault via Auto-Negotiation.

0 = No remote fault condition detected.

Jabber Detect

0, RO

Jabber Detect: This bit only has meaning in 10 Mb/s mode

This bit is a duplicate of the Jabber Detect bit in the BMSR register,

except that it is not cleared upon a read of the PHYSTS register.

1 = Jabber condition detected.

0 = No Jabber.

DP83848JSQ Datasheet(PDF) 49 Page - Texas Instruments

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