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TPS2592AX Datasheet(PDF) 13 Page - Texas Instruments |
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TPS2592AX Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 28 page ![]() ( ) 6 dVdT EXT T 10 VIN C 70pF = ´ ´ + OUT dV Desired output slew rate dT = ( ) OUT dVdT EXT INT dVdT dV dT I C C GAIN æ ö ç ÷ è ø = + ´ TPS2592Ax TPS2592Bx www.ti.com SLVSC11A – JUNE 2013 – REVISED JUNE 2013 DEVICE OPERATION The TPS2592xx is a hot-swap controller with integrated power switch that is used to manage current/voltage/start-up voltage ramp to a connected load. The device starts its operation by monitoring the VIN bus. When VIN exceeds the undervoltage threshold (VUVLO), the device samples the EN/UVLO pin. A high level on this pin will enable the internal MOSFET and also start charging the gate of external blocking FET (if connected) via the BFET pin. As VIN rises, the internal MOSFET of the device and external FET (if connected) will start conducting and allow current to flow from VIN to OUT. When EN/UVLO is held low (i.e., below VENF), the internal MOSFET is turned off and BFET pin is discharged, thereby blocking the flow of current from VIN to OUT. User also has the ability to modify the output voltage ramp time by connecting a capacitor between dV/dT pin and GND. Having successfully completed its start-up sequence, the device now actively monitors its load current and input voltage, ensuring that the adjustable overload current limit IOL is not exceeded and input voltage spikes are safely clamped to VOVC level at the output. This keeps the output device safe from harmful voltage and current transients. The device also has built-in thermal sensor. In the event device temperature (TJ) exceeds TSHDN , typically 160°C, the thermal shutdown circuitry will shut down the internal MOSFET thereby disconnecting the load from the supply. In the TPS2592xL, the output will remain disconnected (MOSFET open) until power to device is recycled or EN/UVLO is toggled (pulled low and then high). The TPS2592xA device will remain off during a cooling period until device temperature falls below TSHDN – 10°C, after which it will attempt to restart. This ON and OFF cycle will continue until fault is cleared. DETAILED PIN DESCRIPTION GND: This is the most negative voltage in the circuit and is used as a reference for all voltage measurements unless otherwise specified. VIN: Input voltage to the TPS2592xx. A ceramic bypass capacitor close to the device from VIN to GND is recommended to alleviate bus transients. The recommended operating voltage range is 4.5V – 13.8V for TPS2592Ax and 4.5V – 5.5V for TPS2592Bx. The device can continuously sustain a voltage of 20V on VIN pin. However, above the recommended maximum bus voltage, the device will be in over-voltage protection (OVP) mode, limiting the output voltage to VOVC. The power dissipation in OVP mode is PD_OVP = (VVIN - VOVC)*IOUT, which can potentially heat up the device and cause thermal shutdown. dV/dT: Connect a capacitor from this pin to GND to control the slew rate of the output voltage at power-on. This pin can be left floating to obtain a predetermined slew rate (minimum TdVdT) on the output. Equation governing slew rate at start-up is shown below: (1) Where: IdVdT = 220 nA (TYP) CINT = 70pF (TYP) GAINdVdT = 4.85 The total ramp time (TdVdT) for 0 to VIN can be calculated using the following equation: (2) For details on how to select an appropriate charging time/rate, refer to the applications section: "INRUSH CURRENT AND POWER DISSIPATION DURING START-UP". BFET: Connect this pin to an external NFET that can be used to disconnect input supply from rest of the system in the event of power failure at VIN. BFET pin is controlled by either UVLO event or EN/UVLO (see table below). BFET can source charging current of 2µA (TYP) and sink (discharge) current from the gate of the external FET via a 26 Ω internal discharge resistor to initiate fast turn-off, typically <1 µs. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: TPS2592Ax TPS2592Bx |
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