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TPS2592Ax

TPS2592Bx

www.ti.com

SLVSC11A – JUNE 2013 – REVISED JUNE 2013

APPLICATION INFORMATION

INRUSH CURRENT AND POWER DISSIPATION DURING START-UP

A successful design needs to keep the junction temperature of TPS2592 well below the absolute-maximum

rating during both dynamic (start-up) and steady state conditions. Dynamic power stresses often are an order of

magnitude greater than the static stresses, so it is important to determine the right start-up time and in-rush

current limit required with system capacitance to avoid thermal shutdown during start-up.

During start-up, as the output capacitor charges, the voltage difference across the internal FET decreases, and

in Figure 49 and variation of power dissipation with ramp-up time is plotted in Figure 50. The average power

dissipated in the device during start-up is equal to area of triangular plot as highlighted.

Figure 49. Start-Up Waveform

For the TPS2592, the inrush current is determined as:

(4)

Power dissipation during start-up will be:

(5)

The above calculation assumes that load does not draw any current until the output voltage has reached its final

value.

If the load draws current during the turn-on sequence, there will be additional power dissipated during the start-

power dissipation with ramp-up time is plotted in Figure 52. The additional power dissipation during start-up

phase is represented and calculated as follows:

(6)

(7)

Average energy loss due in FET during charging time due to resistive load is given by:

(8)

Copyright © 2013, Texas Instruments Incorporated

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