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ADS5295IPFP Datasheet(PDF) 12 Page - Texas Instruments |
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ADS5295IPFP Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 91 page ![]() ADS5295 SBAS595 – DECEMBER 2012 www.ti.com PIN DESCRIPTIONS NAME NO. FUNCTION(1) DESCRIPTION ADCLKN 30 DO Differential LVDS frame clock (1x), negative ADCLKP 29 DO Differential LVDS frame clock (1x), positive AGND 3, 6, 55, 58, 61, 80 G Analog ground pin AVDD 9, 52, 66, 71, 74 S Analog supply pin, 1.8 V Differential clock input, negative CLKN 73 AI For a single-ended clock, tie CLKN to 0 V CLKP 72 AI Differential clock input, positive CS 75 DI Serial enable chip select; active low digital input IN1N 79 AI Differential analog input for channel 1, negative IN1P 78 AI Differential analog input for channel 1, positive IN2N 2 AI Differential analog input for channel 2, negative IN2P 1 AI Differential analog input for channel 2, positive IN3N 5 AI Differential analog input for channel 3, negative IN3P 4 AI Differential analog input for channel 3, positive IN4N 8 AI Differential analog input for channel 4, negative IN4P 7 AI Differential analog input for channel 4, positive IN5N 54 AI Differential analog input for channel 5, negative IN5P 53 AI Differential analog input for channel 5, positive IN6N 57 AI Differential analog input for channel 6, negative IN6P 56 AI Differential analog input for channel 6, positive IN7N 60 AI Differential analog input for channel 7, negative IN7P 59 AI Differential analog input for channel 7, positive IN8N 63 AI Differential analog input for channel 8, negative IN8P 62 AI Differential analog input for channel 8, positive LCLKN 32 DO LVDS differential bit clock output pins (6x), negative LCLKP 31 DO LVDS differential bit clock output pins (6x), positive LGND 12, 50 G Digital ground pin LVDD 11, 49 S Digital and I/O power supply, 1.8 V NC 67 — Do not connect OUT1A_N 14 DO Channel 1 differential LVDS negative data output, one-wire OUT1A_P 13 DO Channel 1 differential LVDS positive data output, one-wire OUT1B_N 16 DO Channel 1 differential LVDS negative data output, two-wire OUT1B_P 15 DO Channel 1 differential LVDS positive data output, two-wire OUT2A_N 18 DO Channel 2 differential LVDS negative data output, one-wire OUT2A_P 17 DO Channel 2 differential LVDS positive data output, one-wire OUT2B_N 20 DO Channel 2 differential LVDS negative data output, two-wire OUT2B_P 19 DO Channel 2 differential LVDS positive data output, two-wire OUT3A_N 22 DO Channel 3 differential LVDS negative data output, one-wire OUT3A_P 21 DO Channel 3 differential LVDS positive data output, one-wire OUT3B_N 24 DO Channel 3 differential LVDS negative data output, two-wire OUT3B_P 23 DO Channel 3 differential LVDS positive data output, two-wire OUT4A_N 26 DO Channel 4 differential LVDS negative data output, one-wire OUT4A_P 25 DO Channel 4 differential LVDS positive data output, one-wire OUT4B_N 28 DO Channel 4 differential LVDS negative data output, two-wire OUT4B_P 27 DO Channel 4 differential LVDS positive data output, two-wire (1) Pin functionality: AI = analog input; DI = digital input; DO = digital output; G = ground; and S = supply. 12 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: ADS5295 |
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