AM3359 datasheet(228/236 Pages) TI

228 / 236 page

AM3359, AM3358, AM3357

AM3356, AM3354, AM3352

SPRS717F – OCTOBER 2011 – REVISED APRIL 2013

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Mechanical Packaging and Orderable Information

7.1

Thermal Data for ZCE and ZCZ Packages

Failure to maintain a junction temperature within the range specified in Table 3-12 reduces operating

lifetime, reliability, and performance—and may cause irreversible damage to the system. Therefore, the

product design cycle should include thermal analysis to verify the maximum operating junction

temperature of the device. It is important this thermal analysis is performed using specific system use

cases and conditions. TI provides an application report to aid users in overcoming some of the existing

challenges of producing a good thermal design. For more information, see AM335x Thermal

Considerations (literature number SPRABT1).

Table 7-1 provides thermal characteristics for the packages used on this device.

NOTE

Table 7-1 provides simulation data and may not represent actual use-case values.

Table 7-1. Thermal Resistance Characteristics (PBGA Package) [ZCE and ZCZ]

NAME

DESCRIPTION

AIR

ZCE

ZCZ

FLOW(1)

(°C/W)(2)

ΘJC

Junction-to-case (1S0P)(3)

10.3

10.2

ΘJB

Junction-to-board (2S2P)(3)

11.6

12.1

ΘJA

Junction-to-free air (2S2P)(3)

0.0

24.7

24.2

1.0

20.5

20.1

2.0

19.7

19.3

3.0

19.2

18.8

ΨJT

Junction-to-package top (2S2P)(3)

0.0

0.4

0.3

1.0

0.6

2.0

0.7

3.0

0.9

0.8

ΨJB

Junction-to-board (2S2P)(3)

0.0

11.9

12.7

1.0

11.7

12.3

2.0

11.7

12.3

3.0

11.6

12.2

(1)

m/s = meters per second.

(2)

°C/W = degress celsius per watt.

(3)

The board types are defined by JEDEC (reference JEDEC standard JESD51-9, Test Board for Area

Array Surface Mount Package Thermal Measurements).

7.2

Via Channel

The ZCE package has been specially engineered with Via Channel™ technology. This allows larger than

normal PCB via and trace sizes and reduced PCB signal layers to be used in a PCB design with the 0.65-

mm pitch package, and substantially reduces PCB costs. It allows PCB routing in only two signal layers

(four layers total) due to the increased layer efficiency of the Via Channel™ BGA technology.

Via Channel™ technology implemented on the ZCE package makes it possible to build an AM335x-based

product with a 4-layer PCB, but a 4-layer PCB may not meet system performance goals. Therefore,

system performance using a 4-layer PCB design must be evaluated during product design.

7.3

Packaging Information

The following packaging information and addendum reflect the most current data available for the

designated devices. This data is subject to change without notice and without revision of this document.

228

Mechanical Packaging and Orderable Information

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