Page 16

2. Operational Description

2.2 System Clock Controller

TMP86FS49FG

Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.

Figure 2-6 Operating Mode Transition Diagram

Note 1: Always set RETM to “0” when transiting from NORMAL mode to STOP mode. Always set RETM to “1” when transiting

from SLOW mode to STOP mode.

Note 3: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *; Don’t care

Note 4: Bits 1 and 0 in SYSCR1 are read as undefined data when a read instruction is executed.

Note 5: As the hardware becomes STOP mode under OUTEN = “0”, input value is fixed to “0”; therefore it may cause interrupt

request on account of falling edge.

Note 6: When the key-on wakeup is used, the edge realease can not function according to some conditions. It is recommended to

set the level realease (RELM = “1”).

High-Z mode.

Note 8: The warmig-up time should be set correctly for using oscillator.

Operating Mode

Oscillator

CPU Core

TBT

Other

Peripherals

Machine Cycle

Time

High

Frequency

Low

Frequency

Single clock

RESET

Oscillation

Stop

Reset

Reset

Reset

4/fc [s]

NORMAL1

Operate

Operate

Operate

IDLE1

Halt

IDLE0

Halt

–

STOP

Stop

Halt

Dual clock

NORMAL2

Oscillation

Oscillation

Operate with

high frequency

Operate

Operate

4/fc [s]

IDLE2

Halt

SLOW2

Operate with

low frequency

4/fs [s]

SLEEP2

Halt

SLOW1

Stop

Operate with

low frequency

SLEEP1

Halt

SLEEP0

Halt

–

STOP

Stop

Halt

System Control Register 1

SYSCR1

(0038H)

76

543

21

0

STOP

RELM

RETM

OUTEN

WUT

(Initial value: 0000 00**)

STOP

STOP mode start

0: CPU core and peripherals remain active

1: CPU core and peripherals are halted (Start STOP mode)

R/W

RELM

Release method for STOP

mode

0: Edge-sensitive release

1: Level-sensitive release

RETM

Operating mode after STOP

mode

0: Return to NORMAL1/2 mode

1: Return to SLOW1 mode

OUTEN

Port output during STOP mode

0: High impedance

1: Output kept

WUT

Warm-up time at releasing

STOP mode

Return to NORMAL mode

Return to SLOW mode

00

3

3

01

10

3

3

11

TENTATIVE