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SIC401DB Datasheet(PDF) 5 Page - Vishay Siliconix |
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SIC401DB Datasheet(HTML) 5 Page - Vishay Siliconix |
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5 / 28 page  Document Number: 63835 S12-2109-Rev. C, 03-Sep-12 www.vishay.com 5 Vishay Siliconix SiC401A, SiC401BCD This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 For technical questions, contact: powerictechsupport@vishay.com ELECTRICAL SPECIFICATIONS Parameter Symbol Test Conditions Unless Specified VIN = 12 V, VDD = 5 V, TA = + 25 °C for typ., - 40 °C to + 85 °C for min. and max., TJ = < 125 °C, typical application circuit Min. Typ. Max. Unit Input Power Supplies Input Supply Voltage VIN 317 V VDD VDD 35.5 VIN UVLO Threshold (a) VUVLO Sensed at ENL pin, rising 2.4 2.6 2.95 Sensed at ENL pin, falling 2.23 2.4 2.57 VIN UVLO Hysteresis VUVLO, HYS 0.25 VDD UVLO Threshold VUVLO Measured at VDD pin, rising 2.5 3 Measured at VDD pin, falling 2.4 2.9 VDD UVLO Hysteresis VUVLO, HYS 0.2 VIN Supply Current IIN ENL, EN/PSV = 0 V , VIN = 17 V 10 20 µA Standby mode; ENL= VDD, EN/PSV = 0 V 130 VDD Supply Current IDD ENL, EN/PSV = 0 V 190 300 SiC401A, EN/PSV = VDD, no load (fSW = 25 kHz), VFB > 0.6 V (b) 0.3 mA SiC401B, EN/PSV = VDD, no load, VFB > 0.6 V (b) 0.7 VDD = 5 V, fSW = 250 kHz, EN/PSV = floating, no load (b) 9 VDD = 3 V, fSW = 250 kHz, EN/PSV = floating, no load (b) 5.5 FB On-Time Threshold Static VIN and load 0.594 0.600 0.606 V Frequency Range fSW Continuous mode operation 1000 kHz Minimum fSW, (SiC401A only) 25 Bootstrap Switch Resistance 10 Timing On-Time tON Continuous mode operation VIN = 12 V, VOUT = 5 V, fSW = 300 kHz, Rton = 133 k 999 1110 1220 ns Minimum On-Time (b) tON, min. 80 Minimum Off-Time (b) tOFF, min. VDD = 5 V 250 VDD = 3 V 370 Soft Start Soft Start Current (b) ISS 3µA Soft Start Voltage (b) VSS When VOUT reaches regulation 1.5 V Analog Inputs/Outputs VOUT Input Resistance RO-IN 500 k Current Sense Zero-Crossing Detector Threshold Voltage VSense-th LX-PGND - 3 + 3 mV Power Good Power Good Threshold PG_VTH_UPPER Upper limit, VFB > internal 600 mV reference ± 20 % PG_VTH_LOWER Lower limit, VFB < internal 600 mV reference - 10 Start-Up Delay Time (between PWM enable and PGOOD high) PG_Td VDD = 5 V, CSS = 10 nF 12 ms VDD = 3 V, CSS = 10 nF 7 Fault (noise-immunity) Delay Time (b) PG_ICC 5µs Leakage Current PG_ILK 1µA Power Good On-Resistance PG_RDS_ON 10 Fault Protection Valley Current Limit ILIM VDD = 5 V, RILIM = 3945, TJ = 0 °C to +125 °C 12.75 15 17.25 A VDD = 3.3 V, RILIM = 3945 13.5 ILIM Source Current 10 µA |
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