SIC401DB datasheet(6/28 Pages) VISHAY

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Document Number: 63835

S12-2109-Rev. C, 03-Sep-12

Vishay Siliconix

SiC401A, SiC401BCD

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

For technical questions, contact: powerictechsupport@vishay.com

Notes:

a. VIN UVLO is programmable using a resistor divider from VIN to ENL to AGND. The ENL voltage is compared to an internal reference.

b. Typical value measured on standard evaluation board.

c. SiC401A/B has first order temperature compensation for over current. Results vary based upon the PCB thermal layout

d. The switch-over threshold is the maximum voltage diff erential between the VLDO and VOUT pins which ensures that VLDO will internally

switch-over to VOUT. The non-switch-over threshold is the minimum voltage diff erential between the VLDO and VOUT pins which ensures that

VLDO will not switch-over to VOUT.

e. The LDO drop out voltage is the voltage at which the LDO output drops 2 % below the nominal regulation point.

ILIM Comparator Offset Voltage

VILM-LK

With respect to AGND

- 10

+ 10

Output Under-Voltage Fault

VOUV_Fault

VFB with respect to Internal 600 mV

reference, 8 consecutive clocks

- 25

Smart Power-Save Protection

Threshold Voltageb

PSave_VTH

VFB with respect to internal 600 mV

+ 10

Over-Voltage Protection Threshold

VFB with respect to internal 600 mV

+ 20

Over-Voltage Fault Delayb

tOV-Delay

5µs

Over Temperature Shutdownb

TShut

10 °C hysteresis

150

°C

Logic Inputs/Outputs

Logic Input High Voltage

VIH

Logic Input Low Volatge

VIL

0.4

EN/PSV Input for P-Save Operation (b)

VDD = 5 V

2.2

EN/PSV Input for Forced Continuous

Operation (b)

EN/PSV Input for Disabling Switcher

00.4

EN/PSV Input Bias Current

IEN

- 10

+ 10

µA

ENL Input Bias Current

IENL

815

FBL, FB Input Bias Current

FBL_ILK

- 1

+ 1

Linear Dropout Regulator

FBL (b)

VLDO ACC

0.75

LDO Current Limit

LDO_ILIM

Short-circuit protection,

VIN = 12 V, VDD < 0.75 V

Start-up and foldback, VIN = 12 V,

0.75 < VDD < 90 % of final VDD value

115

Operating current limit, VIN = 12 V,

VDD > 90 % of final VDD value

135

200

VLDO to VOUT Switch-over Threshold

(d)

VLDO-BPS

- 130

+ 130

VLDO to VOUT Non-switch-over Threshold

(d)

VLDO-NBPS

- 500

+ 500

VLDO to VOUT Switch-over Resistance

RLDO

VOUT = 5 V



LDO Drop Out Voltage (e)

From VIN to VDD,

VDD = + 5 V, IVLDO = 100 mA

1.2

ELECTRICAL SPECIFICATIONS

Parameter

Symbol

Test Conditions Unless Specified

VIN = 12 V, VDD = 5 V, TA = + 25 °C for typ.,

- 40 °C to + 85 °C for min. and max.,

TJ = < 125 °C, typical application circuit

Min.

Typ.

Max.

Unit

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