ADSP-21486KSWZ-2AB datasheet(38/68 Pages) AD

38 / 68 page

Rev. B

Page 38 of 68

March 2013

ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489

Table 36. Serial Ports—External Late Frame Sync

Parameter

Min

Max

Unit

Switching Characteristics

tDDTLFSE

Data Delay from Late External Transmit Frame Sync or External

Receive Frame Sync with MCE = 1, MFD = 0

8.5

tDDTENFS

Data Enable for MCE = 1, MFD = 0

0.5

1 The tDDTLFSE and tDDTENFS parameters apply to left-justified, as well as DSP serial mode, and MCE = 1, MFD = 0.

Figure 22. External Late Frame Sync1

1 This figure reflects changes made to support left-justified mode.

DRIVE

SAMPLE

EXTERNAL RECEIVE FS WITH MCE = 1, MFD = 0

2ND BIT

DAI_P20–1

(SCLK)

DAI_P20–1

(FS)

DAI_P20–1

(DATA CHANNEL

A/B)

1ST BIT

DRIVE

tDDTE/I

tHDTE/I

tDDTLFSE

tDDTENFS

tSFSE/I

DRIVE

SAMPLE

LATE EXTERNAL TRANSMIT FS

2ND BIT

DAI_P20–1

(SCLK)

DAI_P20–1

(FS)

DAI_P20–1

(DATA CHANNEL

A/B)

1ST BIT

DRIVE

tDDTE/I

tHDTE/I

tDDTENFS

tSFSE/I

tHFSE/I

ADSP-21486KSWZ-2AB Datasheet(PDF) 38 Page - Analog Devices

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