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EP3SL70 Datasheet(PDF) 157 Page - Altera Corporation

Part # EP3SL70
Description  Stratix III Device Handbook
PDF  341 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

EP3SL70 Datasheet(HTML) 157 Page - Altera Corporation

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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
1–147
I/O Timing
© July 2010
Altera Corporation
Stratix III Device Handbook, Volume 2
3.0-V
LVTTL
GCLK
t
su
-1.148
-1.184
-1.809 -1.777 -2.001 -1.933 -2.481
-1.777
-2.001
-1.933
-2.481
ns
t
h
1.296
1.330
2.031
2.010
2.258
2.176
2.723
2.010
2.258
2.176
2.723
ns
GCLK
PLL
t
su
-1.476
-1.476
-2.237 -2.273 -2.557 -2.476 -2.996
-2.273
-2.557
-2.476
-2.996
ns
t
h
1.789
1.789
2.726
2.778
3.112
2.999
3.542
2.778
3.112
2.999
3.542
ns
3.0-V
LVCMOS
GCLK
t
su
-1.148
-1.184
-1.809 -1.777 -2.001 -1.933 -2.481
-1.777
-2.001
-1.933
-2.481
ns
t
h
1.296
1.330
2.031
2.010
2.258
2.176
2.723
2.010
2.258
2.176
2.723
ns
GCLK
PLL
t
su
-1.476
-1.476
-2.237 -2.273 -2.557 -2.476 -2.996
-2.273
-2.557
-2.476
-2.996
ns
t
h
1.789
1.789
2.726
2.778
3.112
2.999
3.542
2.778
3.112
2.999
3.542
ns
2.5 V
GCLK
t
su
-1.143
-1.179
-1.818 -1.789 -2.020 -1.952 -2.500
-1.789
-2.020
-1.952
-2.500
ns
t
h
1.291
1.325
2.040
2.022
2.277
2.195
2.742
2.022
2.277
2.195
2.742
ns
GCLK
PLL
t
su
-1.471
-1.471
-2.246 -2.285 -2.576 -2.495 -3.015
-2.285
-2.576
-2.495
-3.015
ns
t
h
1.784
1.784
2.735
2.790
3.131
3.018
3.561
2.790
3.131
3.018
3.561
ns
1.8 V
GCLK
t
su
-1.163
-1.201
-1.858 -1.825 -2.018 -1.950 -2.498
-1.825
-2.018
-1.950
-2.498
ns
t
h
1.313
1.349
2.080
2.058
2.275
2.193
2.740
2.058
2.275
2.193
2.740
ns
GCLK
PLL
t
su
-1.493
-1.493
-2.286 -2.321 -2.574 -2.493 -3.013
-2.321
-2.574
-2.493
-3.013
ns
t
h
1.808
1.808
2.775
2.826
3.129
3.016
3.559
2.826
3.129
3.016
3.559
ns
1.5 V
GCLK
t
su
-1.153
-1.191
-1.835 -1.793 -1.948 -1.880 -2.428
-1.793
-1.948
-1.880
-2.428
ns
t
h
1.303
1.339
2.057
2.026
2.205
2.123
2.670
2.026
2.205
2.123
2.670
ns
GCLK
PLL
t
su
-1.483
-1.483
-2.263 -2.289 -2.504 -2.423 -2.943
-2.289
-2.504
-2.423
-2.943
ns
t
h
1.798
1.798
2.752
2.794
3.059
2.946
3.489
2.794
3.059
2.946
3.489
ns
1.2 V
GCLK
t
su
-1.101
-1.139
-1.758 -1.694 -1.792 -1.724 -2.272
-1.694
-1.792
-1.724
-2.272
ns
t
h
1.251
1.287
1.980
1.927
2.049
1.967
2.514
1.927
2.049
1.967
2.514
ns
GCLK
PLL
t
su
-1.431
-1.431
-2.186 -2.190 -2.348 -2.267 -2.787
-2.190
-2.348
-2.267
-2.787
ns
t
h
1.746
1.746
2.675
2.695
2.903
2.790
3.333
2.695
2.903
2.790
3.333
ns
SSTL-2
CLASS I
GCLK
t
su
-1.072
-1.110
-1.730 -1.678 -1.794 -1.726 -2.274
-1.678
-1.794
-1.726
-2.274
ns
t
h
1.222
1.258
1.952
1.911
2.051
1.969
2.516
1.911
2.051
1.969
2.516
ns
GCLK
PLL
t
su
-1.402
-1.402
-2.158 -2.174 -2.350 -2.269 -2.789
-2.174
-2.350
-2.269
-2.789
ns
t
h
1.717
1.717
2.647
2.679
2.905
2.792
3.335
2.679
2.905
2.792
3.335
ns
SSTL-2
CLASS II
GCLK
t
su
-1.072
-1.110
-1.730 -1.678 -1.794 -1.726 -2.274
-1.678
-1.794
-1.726
-2.274
ns
t
h
1.222
1.258
1.952
1.911
2.051
1.969
2.516
1.911
2.051
1.969
2.516
ns
GCLK
PLL
t
su
-1.402
-1.402
-2.158 -2.174 -2.350 -2.269 -2.789
-2.174
-2.350
-2.269
-2.789
ns
t
h
1.717
1.717
2.647
2.679
2.905
2.792
3.335
2.679
2.905
2.792
3.335
ns
SSTL-18
CLASS I
GCLK
t
su
-1.066
-1.104
-1.717 -1.673 -1.794 -1.724 -2.272
-1.673
-1.794
-1.724
-2.272
ns
t
h
1.216
1.252
1.939
1.903
2.048
1.966
2.509
1.903
2.048
1.966
2.509
ns
GCLK
PLL
t
su
-1.396
-1.396
-2.145 -2.166 -2.347 -2.264 -2.787
-2.166
-2.347
-2.264
-2.787
ns
t
h
1.711
1.711
2.634
2.668
2.899
2.786
3.328
2.668
2.899
2.786
3.328
ns
Table 1–81. EP3SL200 Column Pins Input Timing Parameters (Part 2 of 4)
I/O
Standard
Clock
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Units
Industrial
Commercial
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
1.1 V
V
CCL=
0.9 V



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