AT90USB646 datasheet(278/456 Pages) ATMEL

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278

7593L–AVR–09/12

AT90USB64/128

• RSTDT - Reset Data Toggle bit

Set to automatically clear the data toggle sequence:

For OUT endpoint: the next received packet will have the data toggle 0.

For IN endpoint: the next packet to be sent will have the data toggle 0.

Cleared by hardware instantaneously. The firmware does not have to wait that the bit is cleared.

Clearing by software has no effect.

• 2 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 1 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 0 - EPEN - Endpoint Enable bit

Set to enable the endpoint according to the device configuration. Endpoint 0 shall always be

enabled after a hardware or USB reset and participate in the device configuration.

Clear this bit to disable the endpoint. See Section 23.6, page 263 for more details.

• 7-6 - EPTYPE1:0 - Endpoint Type bits

Set this bit according to the endpoint configuration:

00b: Control10b: Bulk

01b: Isochronous11b: Interrupt

• 5-4 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 3-2 - Reserved for test purpose

The value read from these bits is always 0. Do not set these bits.

• 1 - Reserved

The value read from this bits is always 0. Do not set this bit.

• 0 - EPDIR - Endpoint Direction bit

Set to configure an IN direction for bulk, interrupt or isochronous endpoints.

Clear to configure an OUT direction for bulk, interrupt, isochronous or control endpoints.

Bit

543

EPTYPE1:0

EPDIR

UECFG0X

Read/write

R/W

RRRR

R/W

Initial value

000

AT90USB646 Datasheet(PDF) 278 Page - ATMEL Corporation