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AT90USB646 Datasheet(PDF) 283 Page - ATMEL Corporation |
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AT90USB646 Datasheet(HTML) 283 Page - ATMEL Corporation |
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283 / 456 page ![]() 283 7593L–AVR–09/12 AT90USB64/128 • 5 - Reserved The value read from these bits is always 0. Do not set these bits. • 4 - NAKOUTE - NAK OUT Interrupt Enable bit Set to enable an endpoint interrupt (EPINTx) when NAKOUTI is set. Clear to disable an endpoint interrupt (EPINTx) when NAKOUTI is set. • 3 - RXSTPE - Received SETUP Interrupt Enable flag Set to enable an endpoint interrupt (EPINTx) when RXSTPI is sent. Clear to disable an endpoint interrupt (EPINTx) when RXSTPI is sent. • 2 - RXOUTE - Received OUT Data Interrupt Enable flag Set to enable an endpoint interrupt (EPINTx) when RXOUTI is sent. Clear to disable an endpoint interrupt (EPINTx) when RXOUTI is sent. • 1 - STALLEDE - Stalled Interrupt Enable flag Set to enable an endpoint interrupt (EPINTx) when STALLEDI is sent. Clear to disable an endpoint interrupt (EPINTx) when STALLEDI is sent. • 0 - TXINE - Transmitter Ready Interrupt Enable flag Set to enable an endpoint interrupt (EPINTx) when TXINI is sent. Clear to disable an endpoint interrupt (EPINTx) when TXINI is sent. • 7-0 - DAT7:0 -Data bits Set by the software to read/write a byte from/to the endpoint FIFO selected by EPNUM. • 7-3 - Reserved The value read from these bits is always 0. Do not set these bits. • 2-0 - BYCT10:8 - Byte count (high) bits Set by hardware. This field is the MSB of the byte count of the FIFO endpoint. The LSB part is provided by the UEBCLX register. Bit 76543 210 DAT D7 DAT D6 DAT D5 DAT D4 DAT D3 DAT D2 DAT D1 DAT D0 UEDATX Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 00000 000 Bit 76543 2 1 0 - - - - - BYCT D10 BYCT D9 BYCT D8 UEBCHX Read/write R RRRR R R R Initial value 00000 0 0 0 |
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