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TS68302VR16 Datasheet(PDF) 12 Page - ATMEL Corporation |
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TS68302VR16 Datasheet(HTML) 12 Page - ATMEL Corporation |
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12 / 47 page ![]() 12 TS68302 2117A–HIREL–11/02 Dynamic (Switching) Characteristics The limits and values given in this section apply over the full case temperature range - 55°C to +125°C or -40°C to +85°C depending on selection see “Ordering Information” on page Reference 2 and VCC in the range 4.5V to 5.5V VIL = 0.5V and VIH = 2.4V. The INTERVAL numbers (NUM) refer to the timing diagrams. See Figure 6 to Figure 25. The AC specifications presented consist of output delays, input setup and hold times, and signal skew times. All signals are specified relative to an appropriate edge of the clock (CLKO pin) and possibly to one or more other signals. Figure 6. Clock Timing Diagram Notes: 1. CLKO loading is 50 pF max. 2. CLKO skew from the rising and falling edges of EXTAL will not differ from each other more than 1 ns, if the EXTAL rise time equals the EXTAL fall time. 1 5 5a 5a 4 3 2 VCIH = 4V EXTAL VCIL = 0.6V CLKO Table 7. AC Electrical Specifications - Clock Timing (see Figure 7) Num. Symbol Parameter Min Max Unit f Frequency of Operation 8 16.67 MHz 1t cyc Clock Period (EXTAL) 60 125 ns 2, 3 t CL, tCH Clock Pulse Width (EXTAL) 25 62.5 ns 4, 5 tCr, tCf Clock Rise and Fall Times (EXTAL) 5 ns 5a t CD EXTAL to CLKO delay (1)(2) 211 ns |
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