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AD9625 Datasheet(PDF) 52 Page - Analog Devices

Part # AD9625
Description  12-Bit, 2.0 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter
PDF  56 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9625 Datasheet(HTML) 52 Page - Analog Devices

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AD9625
Data Sheet
Bit No.
Access
Bit Description
3
RW
DIVCLK± output termination selection.
0: DIVCLK± output uses an external 100 Ω resistive termination.
1: DIVCLK± output uses no external resistive termination.
2
Unused.
[1:0]
RW
Control the differential swing for the DIVCLK± output.
00 = 100 mV p-p differential.
01 = 200 mV p-p differential.
10 = 300 mV p-p differential.
11 = 400 mV p-p differential.
Table 101. DDC 0 Gain Control Register, Address 0x130 (Default = 0x00)
Bit No.
Access
Bit Description
[7:6]
Unused.
[5:4]
RW
DDC 0 polyphase (decimate by 2) gain in units of 6 dB.
00: 0 dB gain.
01: 6 dB gain.
10: 12 dB gain.
11: 18 dB gain.
[3:2]
Unused.
[1:0]
RW
DDC 0 polyphase (decimate by 8) gain in units of 6 dB.
00: 0 dB gain.
01: 6 dB gain.
10: 12 dB gain.
11: 18 dB gain.
Table 102. DDC 0 Phase Increment Least Significant Bits Register, Address 0x131 (Default = 0x00)
Bit No.
Access
Bit Description
[7:0]
RW
DDC 0 NCO phase increment value. Phase increment for the NCO within DDC 0. The output frequency =
(decimal(Register 0x132[1:0]; Register 0x131[7:0]) × fS)/1024.
Table 103. DDC 0 Phase Increment Most Significant Bits Register, Address 0x132 (Default = 0x00)
Bit No.
Access
Bit Description
[7:2]
Unused.
[1:0]
RW
DDC 0 NCO phase increment value. Phase increment for the NCO within DDC 0.
Table 104. DDC 1 Gain Control Register, Address 0x138 (Default = 0x00)
Bit No.
Access
Bit Description
[7:6]
Unused.
[5:4]
RW
DDC 1 polyphase (decimate by 2) gain in units of 6 dB.
00: 0 dB gain.
01: 6 dB gain.
10: 12 dB gain.
11: 18 dB gain.
[3:2]
Unused.
[1:0]
RW
DDC 1 polyphase (decimate by 8) gain in units of 6 dB.
00: 0 dB gain.
01: 6 dB gain
10: 12 dB gain.
11: 18 dB gain.
Table 105. DDC 1 Phase Increment Least Significant Bits Register, Address 0x139 (Default = 0x00)
Bit No.
Access
Bit Description
[7:0]
RW
DDC 1 NCO phase increment value. Phase increment for the NCO within DDC 1. The output frequency =
(decimal(Register 0x13A[1:0]; Register 0x139[7:0]) × fS)/1024.
Rev. 0 | Page 52 of 56



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